Method and apparatus for performing a short-circuit and overload disconnection with a semiconductor component

In combination with a short-circuit and overload circuitry and a semiconductor component connected to the short-circuit and overload circuitry, the semiconductor component having a drain, a source and a gate, the semiconductor component having a gate-source voltage UGS applied thereto, a current IJFET flowing therethrough, and a voltage UJFET dropping between the drain and the source, an apparatus for performing a short-circuit and overload disconnection, comprising:

• a processor operatively connected to the semiconductor component for processing measured values and for early recognition of one of a short-circuit and an overload;
• said processor being programmed to:
• adjust, in an operating situation, the gate-source voltage UGS at the semiconductor component, in dependence on the current IJFET, such that, after a charge carrier depletion in the semiconductor component, the voltage UJFET assuming the highest possible value still uncritical for the semiconductor component and for the short-circuit and overload circuitry to be disconnected;
• use an algorithm in the form of U GS = U on ⁡ [ 1 - I JFET ⁢ ( t ) G JFET ⁢ ( U JFET ) ]
• for adjusting the gate-source voltage UGS, where Uon denotes a switching voltage, IJFET(t) denotes the current IJFET in dependence on a time t, and GJFET denotes a function dependent only on the voltage UJFET dropping between the drain and the source;
• and
• drive the semiconductor component as an active limiter for supervising the short-circuit and overload circuitry.

An apparatus for performing a short-circuit and overload disconnection, comprising:

• a semiconductor component being an active limiter for supervising a short-circuit and overload circuitry, said semiconductor component having a drain, a source and a gate, said semiconductor component having a gate-source voltage UGS applied thereto, a current IJFET flowing therethrough, and a voltage UJFET dropping between the drain and the source;
• and
• a processor operatively connected to said semiconductor component for processing measured values and for early recognition of one of a short-circuit and an overload;
• said processor being programmed to:
• adjust, in an operating situation, the gate-source voltage UGS at said semiconductor component, in dependence on the current IJFET, such that, after a charge carrier depletion in said semiconductor component, the voltage UJFET assuming the highest possible value still uncritical for the semiconductor component and for the short-circuit and overload circuitry to be disconnected;
• and
• use an algorithm in the form of U GS = U on ⁡ [ 1 - I JFET ⁢ ( t ) G JFET ⁢ ( U JFET ) ]
• for adjusting the gate-source voltage UGS, where Uon denotes a switching voltage, IJFET(t) denotes the current IJFET in dependence on a time t, and GJFET denotes a function dependent only on the voltage UJFET dropping between the drain and the source.