High speed precision analog to digital convertor

A precision analog to digital convertor comprising:

• a. a PWM circuit having an analog input and generating a modulated signal pulse having a period proportional to the analog input,
• b. a counter triggered by said modulated signal pulse for generating data pulses during the period of each modulated signal pulse,
• c. a subcycle pulse generator for producing subcycle signals representing fractional periods of each of said data pulses,
• d. a latch circuit for latching the counter and an output of the subcycle pulse generator at the end of the period of the modulated signal pulse, and
• e. an encoder for combining the latched data pulses with the latched subcycle pulse generator output to derive a digital number representing the analog input to the PWM circuit.

A precision ADC comprising

• (a) PWM pulse means for generating a PWM pulse having a width proportional to an analog input,
• (b) coarse counter means triggered by said PWM pulse for generating a series of coarse counter pulses during a time interval defined by said width of said PWM pulse,
• (c) subcycle pulse means coupled to said coarse counter means for generating subcycle pulses having durations shorter than each of said coarse counter pulses,
• (d) logic means for counting the number of coarse counter pulses generated during said time interval to represent an MSB number,
• (e) encoder means for counting the number of said subcycle pulses generated during a time period between an end of a last coarse counter pulse generated during said time interval and an end of said time interval to determine an LSB digital number, and
• (f) adder means for adding said MSB and LSB numbers.