Charge-pump circuit and control method thereof
AssigneeSanyo Electric Co., Ltd.
InventorTakao Myono
Life of this patent
Estimating the term…
Abstract
The charge-pump circuit has at least first and second MOS transistors for charge transfer M1 and M2 connected in series, first and second capacitors 1 and 2, a clock driver 3 supplying clock to one end of the second capacitor 2, first switching means S2 for connecting the first and second capacitors to a pumping node in series, and second switching means S1 and S3 for connecting the first and second capacitors to the pumping node in parallel The clock driver 3 changes the state of clock when both of the first and second switching means turn off.
Claims15
A charge-pump circuit comprising:
- at least first and second MOS transistors for charge transfer connected in series;
- first and second capacitors;
- clock supplying means supplying clock to one end of the second capacitor;
- first switching means for connecting said first and second capacitors to a connecting point of the first and second MOS transistors for charge transfer in series;
- and
- second switching means for connecting said first and second capacitors to the connecting point of the first and second MOS transistors for charge transfer in parallel,
- wherein said clock supplying means changes the state of said clock while said first and second switching means are turned off.
A charge-pump circuit comprising:
- at least first and second MOS transistors for charge transfer connected in series;
- plural capacitors;
- clock supplying means supplying clock to these plural capacitors;
- first switching means for connecting said plural capacitors to a connecting point of the first and second MOS transistors for charge transfer in series;
- and
- second switching means or connecting said plural capacitors to the connecting point of the first and second MOS transistors for charge transfer in parallel,
- wherein said clock supplying means changes the state of said clock while said first and second switching means are turned off.
A charge-pump circuit comprising:
- plural MOS transistors for charge transfer connected in series;
- plural capacitors connected to a connecting point of said plural MOS transistors for charge transfer;
- and
- clock supplying means supplying clock to said plural capacitors,
- wherein the plural capacitors include at least first and second capacitors,
- the charge-pump circuit further comprises:
- first switching means for connecting the first and second capacitors to a connecting point of said MOS transistors for charge transfer in series;
- second switching means for connecting the first and second capacitors to the connecting point of said MOS transistors for charge transfer in parallel, and
- wherein said clock supplying means changes the sate of said clock while said first and second switching means are turned off.
A control method of charge-pump circuit comprising:
- at least first and second MOS transistors for charge transfer connected in series;
- first and second capacitors;
- clock supplying means supplying clock to one end of the second capacitor;
- first switching means f or connecting said first and second capacitors to a connecting point of the first and second MOS transistors for charge transfer in series;
- and second switching means for connecting said first and second capacitors to the connecting point of the first and second MOS transistors for charge transfer in parallel,
- said control method comprising a step of changing the state of said clock by said clock supplying means after said first and second switching means are turned off.
A control method of charge-pump circuit comprising:
- at least first and second MOS transistors for charge transfer connected in series;
- plural capacitors;
- clock supplying means supplying clock to these plural capacitors;
- first switching means for connecting said plural capacitors to a connecting point of the first and second MOS transistors for charge transfer in series;
- and second switching means for connecting said plural capacitors to the connecting point of the first and second MOS transistors for charge transfer in parallel,
- said control method comprising a step of changing the state of said clock by said clock supplying means after said first and second switching means are turned off.
Dependencies are inferred from the claim text.