Back to results
US 6,445,217 B1Granted
Edge-triggered latch with balanced pass-transistor logic trigger
AssigneeInternational Business Machines Corporation
InventorsNobuo Kojima, Kevin John Nowka, Huajun Wen
Life of this patent
Estimating the term…
Abstract
An edge-triggered latch that incorporates pass-transistor logic (PTL) in the data and clock generation paths. In accordance with one embodiment, an edge-triggered latch includes a data input and at least one data path PTL transistor that passes data from the data input into a storage node in response to a latch trigger signal. A latch trigger circuit generates the latch-trigger signal in response to a clock signal transition.
Claims4
An edge-triggered latch comprising:
- a pair of complementary data inputs;
- at least one pass-transistor logic (PTL) transmission gate configured as a pass-gate with respect to each of said pair of complementary data inputs and having a pair of gate terminals connected to a first and second control node, wherein said at least one PTL transmission gate passes data from said pair of complementary data inputs into a pair of complementary storage nodes in response to a differential latch trigger pulse applied to said first and second control nodes;
- and
- a differential pulse generator including a first and a second latch trigger PTL transistor that pass said differential latch trigger pulse to said first and second control nodes in response to a clock signal transition.
1 more element
Dependencies are inferred from the claim text.