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US 6,445,216 B1Granted
Sense amplifier having reduced Vt mismatch in input matched differential pair
AssigneeIntel Corporation
InventorsDavid W. Bruneau, Siva G. Narendra, Vivek K. De
Life of this patent
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Abstract
A sense amplifier in which its output nodes provide a full voltage swing between the supply and return nodes. The sense amplifier further includes a reset circuit to selectively equalize the first and second output nodes. An output of the sense amplifier is coupled to either a digital logic gate or a flip-flop to receive the full swing. Each field effect transistor (FET) of the input pair in the sense amplifier is either zero body biased or forward body biased, so that a bulk-source junction of each FET is either zero biased or forward biased.
Claims12
A circuit comprising:
- a sense amplifier having (1) an input matched differential p-channel field effect transistor (FET) pair source coupled between a power supply node and a power return node, each FET of the input pair having gate, drain, source, and bulk regions, (2) first and second output nodes whose voltages are to be driven in opposite directions by the input pair, each output node to provide a full voltage swing between the supply and return nodes, (3) a reset circuit coupled to selectively equalize the first and second output nodes, and (4) a p-channel switching field effect transistor coupled in series between a common source of the pair and the power supply node;
- one of a digital logic gate and a latch, having an input coupled to receive the full swing and in response provide at an output one of only two stable DC voltages;
- and
- forward body bias (FBB) generation circuit coupled to the bulk region of each FET of the input pair and of the switching FET in the sense amplifier.
1 more element
A processor integrated circuit die comprising:
- an on-chip low voltage data path having a signal conductor;
- on-chip full swing logic circuitry;
- and
- an on-chip interface between the low voltage data path and the full swing logic circuitry, the interface includes a sense amplifier that has (1) an input matched differential p-channel field effect transistor (FET) pair source coupled between a power supply node and a power return node, each FET of the input pair having gate, drain, source, and bulk regions, (2) first and second output nodes whose voltages are to be driven in opposite directions by the input pair, each output node to provide a full voltage swing between the supply and return nodes, (3) a reset circuit coupled to selectively equalize the first and second output nodes and (4) a p-channel switching field effect transistor coupled in series between a common source of the pair and the power supply node, and forward body bias (FBB) generation circuit coupled to the bulk region of each FET of the input pair and of the switching FET in the sense amplifier.
1 more element
A method comprising:
- removing a reset condition in a sense amplifier, which allows the amplifier to detect an increasing input voltage, the sense amplifier having (1) an input matched differential p-channel field effect transistor (FET) pair source coupled between a power supply node and a power return node, each FET of the input pair having gate, drain, source, and bulk regions, (2) first and second output nodes whose voltages are to be driven in opposite directions by the input pair, each output node to provide a full voltage swing between the supply and return nodes, (3) a reset circuit coupled to selectively equalize the first and second output nodes, and (4) a pchannel switching field effect transistor coupled in series between a common source of the pair and the power supply node;
- and then
- disabling the sense amplifier after the first or second output voltage has reached the full swing,
- wherein a bulk-source junction of each FET of the input differential pair and of the switching FET in the sense amplifier is forward biased so that the sense amplifier can be enabled earlier in time than if the source-bulk junction were reverse-biased, to detect a smaller input voltage.
1 more element
Dependencies are inferred from the claim text.