Mixed metal nitride and boride barrier layers
AssigneeMicron Technology, Inc.
InventorsBrian A. Vaartstra, Donald L. Westmoreland
Life of this patent
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Abstract
Mixed metal aluminum nitride and boride diffusion barriers and electrodes for integrated circuits, particularly for DRAM cell capacitors. Also provided are methods for CVD deposition of MxAlyNzBw alloy diffusion barriers, wherein M is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, or W; x is greater than zero; y is greater than or equal to zero; the sum of z and w is greater than zero; and wherein when y is zero, z and w are both greater than zero.
Claims41
A semiconductor device comprising:
- a substrate comprising silicon;
- a diffusion barrier layer over said substrate, said diffusion barrier layer comprising aluminum, a metal selected from the group consisting of Ti, Zr, Hf, V, Nb, Ta, Cr, Mo and W, and also comprising N and B;
- and
- a layer of dielectric material on said diffusion barrier, said dielectric material comprising a material selected from the group consisting of tantalum pentoxide (Ta2O5), Barium Strontium Titanate (BST), Strontium Titanate (ST), Lead Zirconium Titanate (PZT), Strontium Bismuth Tantalate (SBT) and Bismuth Zirconium Titanate (BZT).
A diffusion barrier located between a siihcon substrate and a metal film in a semiconductor device, said diffusion barrier comprising:
- a mixed metal boron-nitride layer formed on said film and having the formula MxAlyNzBw, wherein M is Ti, Zr, Hf. V, Nb, Ta, Cr, Mo, or W;
- wherein x+y=1, and either z+w/2=1 or z+2w=1.
A capacitor, comprising a first electrode layer, a dielectric layer, and a second electrode layer, said dielectric layer separating said first and second electrode layers wherein at least one of said first and second electrode layers comprises a material having the formula MxAlyNzBw, wherein M is Ti, Zr, Hf, V, Nb, Ta, Cr. Mo, or W;
- wherein x+y=1, and either z+w/2=1 or z+2w=1.
A capacitor, comprising a dielectric layer between a first conductive layer and a second conductive layer, and a conductive barrier layer between one of said first and second conductive layers and said dielectric layer, said conductive barrier layer containing a material having the formula MxAlyNzBw, wherein M is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, or W;
- wherein x+y=1, and either z+w/2=1 or z+2w=1.
An integrated circuit comprising a capacitor, said capacitor comprising a first electrode, a dielectric layer, and a second electrode, at least one of said first and second electrodes comprising a material having the formula MxAlyNzBw, wherein M is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, or W;
- x is greater than zero;
- y is greater than zero;
- and z and w are greater than zero.
Dependencies are inferred from the claim text.