Methods of forming integrated circuitry and methods of forming elevated source/drain regions of a field effect transistor

A method of forming integrated circuitry comprising:

• forming a transistor gate line over a surface of a semiconductive substrate, the transistor gate line comprising an undoped material and the semiconductor substrate comprising source/drain diffusion regions proximate the transistor gate line;
• subsequent to forming said transistor gate line, blanket forming a layer comprising semiconductive material over the transistor gate line and the surface, including over the source/drain diffusion regions, the layer joining with semiconductive material of the surface laterally proximate the gate line and the layer being disposed elevationally upward from the surface;
• removing portions of the blanket formed layer to define elevated source/drain regions laterally proximate the transistor gate line;
• and
• in a common step, providing conductivity-enhancing impurity into both the elevated source/drain material and the gate line.

A method of forming integrated circuitry comprising:

• first forming a pair of spaced apart gate lines over a semiconductive substrate, the gate lines comprising a gate dielectric portion, a semiconductive material portion over the dielectric portion and an insulative cap portion over, the semiconductive material portion and the semiconductive substrate comprising source/drain diffusion regions proximate the transistor gate lines;
• after the first forming, blanket depositing a layer comprising semiconductive material laterally proximate the gate lines and over the source/drain diffusion regions, the layer joining with semiconductive material of the substrate laterally proximate the gate lines, the blanket formed semiconductive material comprising elevated source/drain material for transistors formed of the gate lines;
• removing portions of the blanket formed layer to define elevated source/drain regions;
• commonly doping the blanket formed layer and the semiconductive material layer with a conductivity enhancing impurity.