Method to improve nitride floating gate charge trapping for NROM flash memory device
AssigneeMacronix International Co., Ltd.
InventorsKent Kuo-Hua Chang, Cheng-Chen Calvin Hsueh
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Abstract
A method to improve nitride floating gate charge trapping for NROM flash memory device is disclosed. The present invention uses the SiON to replace the SiN of the NROM floating gate of the prior art. This arrangement improves the endurance and the reliability of the device and also extends data retention times. The present invention also discloses the integrated processes to fabricate the NROM flash memory device. Using the processes, the steps of fabricating the NROM are efficiently reduced, and the defects caused by the cleaning steps are eliminated.
Claims7
A method using an integrated process to fabricate the NROM flash memory device, comprising the steps of:
- providing a single wafer thermal consecutive process system to a semiconductor substrate;
- using a APCVD to form a first oxide layer on and overlaying said semiconductor substrate;
- using a PECVD to form a SiON layer on and overlaying said first oxide layer;
- using a LPCVD to form a second oxide layer on and overlying said SiON layer;
- and
- using a LPCVD to form a polysilicon layer on and overlying said second oxide layer.
Dependencies are inferred from the claim text.