US 6,444,512 B1 · Dual metal gate transistors for CMOS process

Abstract

A process for forming a first transistor of a first conductivity type and a second transistor of a second conductivity type in a semiconductor substrate is disclosed. The substrate has a first well of the first conductivity type and a second well of the second conductivity type. A gate dielectric is formed over the wells. A first metal layer is then formed over the gate dielectric. A portion of the first metal layer located over the second well is then removed. A second metal layer different from said first metal is then formed over the wells and a gate mask is formed over the second metal. The metal layers are then patterned to leave a first gate over the first well and a second gate over the second well. Source/drains are then formed in the first and second wells to form the first and second transistor.

Claims34

Dependent claims

A method for forming a first transistor of a first conductivity type and a second transistor of a second conductivity type in a semiconductor substrate having a first well of the first conductivity type and a second well of the second conductivity type, comprising the steps of:

forming a gate dielectric over the first and second wells;
forming a first metal layer of a first metal type over the gate dielectric;
removing a first portion of the first metal layer, the first portion being over the second well;
then forming a second metal layer of a second metal type different from said first metal type over the first and second wells;
forming a gate mask over the first well and the second well;
patterning the first metal layer and the second metal layer according to the mask to leave a first gate over the first well and a second gate over the second well;
forming a first source and a first drain of the second conductivity type in the first well adjacent to the first gate to form the second transistor;
and
forming a second source and second drain of the first conductivity type in the second well adjacent to the second gate to form the first transistor.

6 more elements

Dependencies are inferred from the claim text.

Dual metal gate transistors for CMOS process

Life of this patent

Dual metal gate transistors for CMOS process

Life of this patent

Abstract

Claims34