Low triggering N MOS transistor for ESD protection working under fully silicided process without silicide blocks

A method for forming an electro-static discharge (ESD) protection device comprising:

• a) forming a first n+ region and a second n+ region separated by a first isolation region in a substrate;
• said substrate is p− doped;
• b) forming a first n− well overlapping a portion of said first isolation region and overlapping a portion of said first n+ region;
• c) forming a first p+ region adjacent to, but not contacting said second n+ region;
• d) forming a second n− well overlapping a portion of said first p+ region and all of a second n+ region;
• said second n+ region abutting a first isolation region;
• said second n− well overlapping a portion of said first isolation region;
• said second n− well between said first p+ region and said second n+ region;
• e) forming a first gate on said first isolation region;
• f) forming said first P+ region, and said second N+ region connected in parallel to a source;
• and
• g) forming silicide regions over the first and second N+ regions and the first p+ region.

A method for forming an electrostatic discharge (ESD) protection device comprising:

• a) forming a first n+ region and a second n+ region separated by a first isolation region in a substrate;
• said substrate is p− doped;
• b) forming a first n− well overlapping a portion of said first isolation region and overlapping a portion of said first n+ region;
• c) forming a first p+ region adjacent to, but not contacting said second n+ region;
• d) forming a second n− well overlapping a portion of said first p+ region and all of a second n+ region;
• said second n+ region abutting a first isolation region;
• said second n− well overlapping a portion of said first isolation region;
• said second n− well between said first p+ region and said second n+ region;
• e) forming a third n+ region separated from a first p+ region by a portion of said substrate;
• f) forming a first gate on said first isolation region;
• g) forming a connection to said third n+ region, said first P+ region, and said second N+ region;
• the connection is in parallel to a source;
• and
• h) forming silicide regions over the first, second and third N+ regions and the first p+ region.

A method for forming an electro-static discharge (ESD) protection device comprising:

• a) forming a first n+ region and a second n+ region separated by a first isolation region in a substrate;
• said substrate is p− doped;
• b) forming a first n− well overlapping a portion of said first isolation region and overlapping a portion of said first n+ region;
• c) forming a first p+ region adjacent to, but not contacting said second n+ region;
• d) forming a second n− well overlapping a portion of said first p+ region and all of a second n+ region;
• said second n+ region abutting a first isolation region;
• said second n− well overlapping a portion of said first isolation region;
• said second n− well between said first p+ region and said second n+ region;
• e) forming a third n+ region separated from a first p+ region by a channel region in said substrate;
• f) forming a first gate on said first isolation region;
• g) forming a second gate over said channel region;
• h) forming said third n+ region, said first P+ region, and said second N+ region connected in parallel to a source;
• i) forming silicide regions over the first, second and third N+ regions and the first p+ region.