Lattice structure for IIR and FIR filters with automatic normalization
AssigneeCreative Technologies Corp.
InventorJean Laroche
Life of this patent
Estimating the term…
Abstract
Apparatus providing a “reverse lattice” structure for IIR and FIR filters, which exhibits desirable scaling properties at no additional computational or memory cost. The reverse lattice structure implementation of an IIR filter scales down signals at sections corresponding to reflection coefficients close to 1 in magnitude. This feature provides automatic scaling for poles lying close to the unit circle which would otherwise produce large amplification factors.
Claims10
Reverse lattice structure for processing an input signal to form an output signal, comprising:
- means to scale the input signal to form a scaled input signal;
- means to delay a first feedback signal and to form a delayed feedback signal;
- means to combine the delayed feedback signal with the scaled input signal to form a second feedback signal;
- means to scale the second feedback signal to form a third feedback signal;
- and
- means to combine the input signal and the third feedback signal to form the output signal.
A method for processing an input signal to form an output signal, comprising;
- receiving the input signal;
- scaling the input signal to form a scaled input signal;
- receiving a feedback signal;
- delaying the feedback signal to form a delayed feedback signal;
- combining the scaled input signal with the delayed feedback signal to form an adjusted feedback signal;
- scaling the adjusted feedback signal to form a scaled adjusted feedback signal;
- and
- combining the input signal with the scaled adjusted input signal to form the output signal.
Lattice structure for processing an input signal to form an output signal, comprising:
- a first summing node having logic to sum the input signal and a first criss-cross signal to produce the output signal;
- a delay module having logic to receive a feedback signal and to delay the feedback signal to produce a delayed feedback signal;
- a second summing node coupled to the delay module and having logic to sum the delayed feedback signal and a second criss-cross signal to produce an output feedback signal;
- a first amplifier coupled between the first and second summing nodes and having logic to receive the output feedback signal and to scale the output feedback signal by a first parameter to form the first crisscross signal;
- and
- a second amplifier coupled between the first and second summing nodes and having logic to receive the input signal and to scale the input signal by a second parameter to form the second crisscross signal.
Dependencies are inferred from the claim text.