Method and apparatus for digital to analog conversion
AssigneeTexas Instruments Incorporated
InventorsXavier Albinet, Pascal Guigon
Life of this patent
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Abstract
A digital to analog converter (40) includes a pulse width modulator (14) and a class-D amplifier (16). The class-D amplifier (16) includes a low pass filter (34). A differential signal is available from two nodes (outp, outm) on the amplifier. Common mode compensation circuitry (42) generates a compensation signal during periods where a PWM signal is not being generated to maintain a common mode average value of (Avdd +Avss)/2 from the nodes, without affecting the differential signal.
Claims17
A digital to analog converter comprising:
- an amplifier circuit;
- a pulse width modulator for generating signals on first and second nodes of amplifier circuit to create a differential signal responsive to an input;
- compensation circuitry for generating an identical signal on said first and second nodes without affecting said differential signal to obtain a zero-averaging common mode signal.
The digital to analog converter of comprising:
- an amplifier circuit;
- a pulse width modulator for generating signals on first and second nodes of the amplifier circuit to create a differential signal responsive to an input;
- compensation circuitry for generating an identical signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal;
- and
- a multi-bit sigma-delta modulation circuit coupled to the pulse width modulator.
A digital to analog converter comprising:
- a class-D amplifier circuit;
- a pulse width modulator for generating signals on first and second nodes of the amplifier circuit to create a differential signal responsive to an input;
- compensation circuitry for generating an identical signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal.
A digital to analog converter comprising:
- an amplifier circuit;
- a pulse width modulator for generating signals on first and second nodes of the amplifier circuit to create a differential signal responsive to an input;
- compensation circuitry for generating an identical signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal;
- and
- wherein said compensation circuitry comprises circuitry for:
- modulating said first and second nodes between first and second voltage levels;
- and
- generating a signal on said first and second nodes at a third voltage level.
A method of performing digital to analog conversion, comprising the steps of:
- generating a pulse width modulated signal on first and second nodes of an amplifier circuit to create a differential information signal;
- generating a compensation signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal on said first and second nodes, the compensation signal is a zero-averaging common mode signal.
A method of performing digital to analog conversion, comprising the steps of:
- generating a pulse width modulated signal on first and second nodes of an amplifier circuit to create a differential information signal;
- generating an identical compensation signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal on said first and second nodes;
- and
- generating a first modulated signal using a multi-bit sigma-delta modulation circuit.
A method of performing digital to analog conversion, comprising the steps of:
- generating a pulse width modulated signal on first and second nodes of class-D amplifier to create a differential information signal;
- generating an identical compensation signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal on said first and second nodes;
- generating a first modulated signal using a multi-bit sigma-delta modulation circuit;
- and
- wherein said step of generating a pulse width modulated signal comprises generating a pulse width modulated signal on the first and second nodes of the class-D amplifier.
A method of performing digital to analog conversion, comprising the steps of:
- generating a pulse width modulated signal on first and second nodes of an amplifier circuit that includes a filter to create a differential information signal;
- generating an identical compensation signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal on said first and second nodes;
- and
- the step of generating a pulse width modulated signal comprises generating a pulse width modulated signal on the first and second nodes of the amplifier circuit.
A method of performing digital to analog conversion, comprising the steps of:
- generating a pulse width modulated signal on first and second nodes of an amplfier circuit to create a differential information signal;
- generating an identical compensation signal on said first and second nodes without affecting said differential signal to obtain a desired common mode average signal on said first and second nodes;
- and
- wherein said step of generating a signal on said first and second nodes at a third voltage level comprises the step of generating a signal on said first and second nodes at said first voltage level.
Dependencies are inferred from the claim text.