System and method for generating clock signals

A method generating a clock signal as a function of a system clock, comprising:

• generating a plurality of pulse streams, wherein the pulse streams have overlapping pulses, wherein each pulse stream has a period that is at least that of the system clock;
• and
• combining two or more of the pulse streams to form a clock signal, wherein the clock signal has a frequency less than the system clock.

A method generating a clock signal as a function of a system clock, comprising:

• generating a plurality of pulse streams, wherein the pulse streams have overlapping pulses, wherein each pulse stream has a period that is at least that of the system clock, and
• combining two or more of the pulse streams to form a clock signal having a frequency less than that of the system clock, wherein combining includes stopping the first and second pulse streams in order to stop the clock signal.

In integrated clock controller having multiple clock domains, the clock controller comprising:

• a phase sequencer clocked by a first clock signal at a first frequency, wherein the phase sequencer generates a plurality of pulse streams, wherein the pulse streams have overlapping pulses, wherein each pulse stream has a period that is at least that of the first clock signal;
• and
• clock generation logic, wherein the clock generation logic combines the pulse streams to form a second clock signal having a second frequency and a third clock signal having a third frequency, wherein the second frequency is less than the third frequency and the third frequency is less than the first frequency, wherein the second and third clock signals are synchronized to the first clock signal.