Method and apparatus for determining phase locked loop jitter
AssigneeInternational Business Machines Corporation
InventorsJames P. Eckhardt, Keith A. Jenkins
Life of this patent
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Abstract
An exemplary embodiment of the invention is a method for evaluating jitter of a phase locked loop circuit generating a phase locked loop output signal. The method includes generating a test initiate signal and generating a trigger signal in response to the test initiate signal. The trigger signal is synchronized with the phase locked loop output signal. A disturbance signal is generated to induce jitter in the phase locked loop output signal. The jitter in the phase locked loop output signal is then evaluated.
Claims16
A method for evaluating jitter of a phase locked loop circuit generating a phase locked loop output signal, the method comprising:
- generating a test initiate signal;
- generating a trigger signal responsive to said test initiate signal;
- synchronizing said trigger signal with said phase locked loop output signal;
- generating a disturbance signal to induce jitter in said phase locked loop output signal;
- and,
- evaluating said jitter in said phase locked loop output signal.
A system for evaluating jitter of a phase locked loop circuit generating a phase locked loop output signal, the system comprising:
- a pulse generator for generating a test initiate signal;
- a storage device for generating a trigger signal responsive to said test initiate signal;
- said storage device synchronizing said trigger signal with a clock signal of said phase locked loop circuit;
- circuitry for generating a disturbance signal to induce jitter in said phase locked loop output signal;
- and,
- test equipment for evaluating said jitter in said phase locked loop output signal.
Dependencies are inferred from the claim text.