Apparatus for measuring the duty cycle of a high speed clocking signal

Abstract

A system and method for accurately measuring the duty cycle of an input periodic pulsed signal. The system includes a device for converting the input signal to be measured into a first dc voltage and, a device maintaining representations of potential duty cycle values that are selectable in an iterative fashion. At each iteration, in response to a selected duty cycle value, a second dc voltage is generated that represents the difference between the duty cycle of the input signal to be measured and the duty cycle represented by a current selected encoded duty cycle value. A selection mechanism responds to the first and second dc voltages for selecting a different encoded duty cycle for a successive iteration. The system selects an encoded duty cycle value at each iteration until the first and second dc voltages match. At such time, the current selected encoded duty cycle value represents the duty cycle of the input voltage for output thereof. By representing the input signal's duty cycle as a dc voltage, the system may measure the input signal's duty cycle accurately regardless of its frequency.

Dependencies are inferred from the claim text.