Semiconductor-on-insulator body-source contact and method
AssigneeAdvanced Micro Devices, Inc.
InventorsWei Long, Qi Xiang, Yowjuang W. Liu
Life of this patent
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Abstract
A semiconductor device includes a wafer having a semiconductor layer with source, body and drain regions. A electrically-conducting region of the semiconductor region overlaps and electrically couples the source region and the body region. The electrical coupling of the source and body regions reduces floating body effects in the semiconductor device. A method of constructing the semiconductor device utilizes spacers, masking, and/or tilted implantation to form an source-body electrically-conducting region that overlaps the source and body regions of the semiconductor layer, and a drain electrically-conducting region that is within the drain region of the semiconductor layer.
Claims17
A semiconductor device comprising:
- a semiconductor layer having source, drain, and body regions which are operatively coupled together;
- a gate operatively coupled with the source, drain, and body regions;
- and
- a first electrically-conducting region within the source and body regions, the first electrically-conducting region electrically coupling the source region and the body region;
- a second electrically-conducting region, wherein the second electrically-conducting region is at least partially within the drain region;
- wherein the source and drain regions each have a deep-doped subregion, the deep-doped subregions being asymmetric with one another about the gate;
- wherein the source and drain regions have respective shallow-doped subregions, and wherein the shallow-doped subregions are symmetric with one another about the gate;
- wherein the electrically-conducting regions are symmetric with one another about the gate;
- and
- wherein the electrically-conducting regions are semiconductor-metal compound.
A semiconductor device comprising:
- a semiconductor layer having source, drain, and body regions which are operatively coupled together;
- a gate dielectric on a surface of the semiconductor layer;
- a gate on the gate dielectric, wherein the gate is operatively coupled to the source, drain, and body regions;
- and
- a source-side semiconductor-metal compound region at least partially in the source and body regions, the source-side semiconductor-metal compound region electrically coupling the source region and the body region;
- a drain-side semiconductor-metal compound region at least partially in the drain region;
- wherein the source region and the body region have a source-body boundary therebetween;
- wherein a first portion of the source-body boundary is substantially parallel to the surface;
- and
- wherein the source-side semiconductor-metal compound region overlaps the first portion of the source-body boundary, such that the source-side semiconductor-metal compound is on both sides of the first portion of the source-side semiconductor-metal compound region, and such that the source-side semiconductor-metal compound is continuous across at least part of the first portion of the source-side semiconductor-metal compound region.
Dependencies are inferred from the claim text.