Non-volatile semiconductor device and non-volatile semiconductor memory device for storing multi-value information
AssigneeNEC Corporation
InventorKazuteru Suzuki
Life of this patent
Estimating the term…
Abstract
A non-volatile semiconductor device stores multi-value information of at least two bits in one memory cell. A source region and a drain region serve as diffusion regions. A first channel region and a second channel region are placed between the source region and the drain region. A first gate electrode is arranged over the first channel region and the drain region. A second gate electrode is arranged over the second channel region and the source region. The first channel region stores a first threshold value while the second channel region stores a second threshold value different from the first threshold value.
Claims13
A non-volatile semiconductor device which stores multi-value information of at least two bits in one memory cell, comprising:
- a source region and a drain region which serve as diffusion regions;
- a first channel region and a second channel region which are placed between the source region and the drain region;
- a first gate electrode formed of a first gate material layer which is arranged over the first channel region and substantially covers the drain region;
- and
- a second gate electrode formed of a second gate material layer different from the first gate material layer which is arranged over the second channel region and the source region;
- the first channel region storing a first threshold value while the second channel region storing a second threshold value different from the first threshold value.
A non-volatile semiconductor memory device which stores multi-value information of at least two bits in one memory cell, comprising:
- a plurality of substantially parallel first word lines disposed in a horizontal direction;
- a plurality of diffusion lines, having a first width, disposed in a direction substantially perpendicular to the first word lines;
- a plurality of second word lines having a second width larger than the first width, disposed to substantially cover at least alternate ones of the diffusion layers;
- a first channel region disposed under the first word line and between adjacent ones of the plurality of diffusion lines and which stores a first threshold value;
- a second channel region disposed under the second word line and between the adjacent diffusion lines and which stores a second threshold value different from the first threshold value;
- and
- a sense amplifier which is coupled to at least one of the diffusion layers and which produces combinations of the first and second threshold values as the multi-value information.
A semiconductor memory device which stores multi-value information of at least two bits in one memory cell, comprising:
- a plurality of first word lines which are placed in a horizontal direction;
- a plurality of diffusion layers which are placed in a perpendicular direction for the first word lines;
- a plurality of second word lines which are alternately placed so as to cover the diffusion layers;
- a first channel region which is arranged under the first word line and between adjacent diffusion lines and which stores a first threshold value
- a second channel region which is arranged under the second word line and between the adjacent diffusion lines and which stores a second threshold value different from the first threshold value;
- and
- a sense amplifier which is coupled to at least one of the diffusion layers and which produces combinations of the first and second threshold values as the multi-value information, wherein:
- each of the diffusion lines has a first width, and
- each of the second word lines has a second width, the second width being wider than the first width.
A semiconductor memory device which stores multi-value information of at least two bits in one memory cell, comprising:
- a plurality of first word lines which are placed in a horizontal direction;
- a plurality of diffusion layers which are placed in a perpendicular direction for the first word lines;
- a plurality of second word lines which are alternately placed so as to cover the diffusion layers;
- a first channel region which is arranged under the first word line and between adjacent diffusion lines and which stores a first threshold value a second channel region which is arranged under the second word line and between the adjacent diffusion lines and which stores a second threshold value different from the first threshold value;
- and
- a sense amplifier which is coupled to at least one of the diffusion layers and which produces combinations of the first and second threshold values as the multi-value information, wherein:
- the diffusion line serves as any one of a source region and a drain region, the first word line serves as a first gate electrode over the drain region and the first channel region, and
- the second word line serves as a second gate electrode over the source region and the second channel region.
A method of reading-out multi-value information from a single memory cell of a non-volatile memory which has first and second channel regions between diffusion layers serving as source and drain regions, a first gate electrode disposed over the first channel region and a second gate electrode disposed over the second channel region, the first channel region having a first threshold value while the second channel region having a second threshold value, comprising the steps of;
- judging the first and second threshold values stored in the first and second channel regions;
- and
- producing combinations of the first and second threshold values as the multi-value information read-out information.
Dependencies are inferred from the claim text.