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US 6,441,399 B1Granted
Semiconductor integrated system
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsJun Koyama, Yuji Kawasaki
Life of this patent
Estimating the term…
Abstract
In a monolithic active matrix circuit that uses offset-gate TFTs in which the gate electrode is offset from the source and drain regions or TFTs whose gate insulating film is formed by vapor deposition, not only an active matrix circuit but also a drive circuit therefor is formed by using P-channel TFTs.
Claims56
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a driver circuit comprising a plurality of second thin film transistors formed over said substrate for driving said first thin film transistors, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of wirings formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels, formed over a substrate having an insulating surface;
- a driver circuit comprising a plurality of second thin film transistors formed over said substrate for driving said first thin film transistors, each of said first and second thin film transistors comprising a crystalline semiconductor layer having source and drain regions and a channel forming region extending therebetween, a gate insulating film formed on said channel forming region and a gate electrode formed on said gate insulating film;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of wirings formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a driver circuit comprising a plurality of second thin film transistors formed over said substrate for driving said first thin film transistors, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of wirings formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof;
- and
- a semiconductor chip formed over the substrate,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
5 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a driver circuit comprising a plurality of second thin film transistors formed over said substrate for driving said first thin film transistors, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of conductors formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a source driver circuit comprising a plurality of second thin film transistors formed over said substrate, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of conductors formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a gate driver circuit comprising a plurality of second thin film transistors formed over said substrate, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of conductors formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a source driver circuit comprising a plurality of second thin film transistors formed over said substrate, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of wirings formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
A semiconductor device comprising:
- a plurality of first thin film transistors for switching pixels formed over a substrate having an insulating surface;
- a gate driver circuit comprising a plurality of second thin film transistors formed over said substrate, each of said first and second thin film transistors having a channel forming region comprising crystalline silicon;
- an interlayer insulating film formed over said first thin film transistors and said second thin film transistors;
- a plurality of pixel electrodes formed on said interlayer insulating film and electrically connected to said first thin film transistors at one of source or drain thereof;
- a plurality of wirings formed on said interlayer insulating film and electrically connected to said first thin film transistors at the other one of the source or drain thereof,
- wherein all of said first and second thin film transistors are p-channel type thin film transistors.
3 more elements
Dependencies are inferred from the claim text.