Metal gate with PVD amorphous silicon and silicide for CMOS devices and method of making the same with a replacement gate process
AssigneeAdvanced Micro Devices, Inc.
InventorsPaul R. Besser, Qi Xiang, Matthew S. Buynoski
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Abstract
A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a physical vapor deposited (PVD) layer of amorphous silicon on the high k gate dielectric. The metal is then formed on the PVD amorphous silicon layer. An annealing process forms silicide in the gate, with a layer of silicon remaining unreacted. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the PVD amorphous silicon layer.
Claims11
A method of forming a semiconductor structure, comprising the steps of:
- forming a precursor having a substrate with active regions separated by a channel, and a temporary gate over the channel and between dielectric structures;
- removing the temporary gate to form a recess with a bottom and sidewalls between the dielectric structures;
- depositing amorphous silicon in the recess by physical vapor deposition;
- depositing a metal in the recess on the amorphous silicon;
- and
- annealing to cause the metal and a portion of the amorphous silicon to interact to form metal silicide, with a portion of the amorphous silicon remaining unreacted with the metal.
Dependencies are inferred from the claim text.