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AssigneeKulicke & Soffa Holdings, Inc.
InventorsJames L. Lykins, Jan I. Strandberg
Estimating the term…
The present invention provides a method for controlling the mechanical stresses at the interfaces of the metal and dielectric materials in the printed wiring substrates of high density interconnects. The invention enables the minimization of cracking due to these stresses and does so in an economically attractive process that is able to meet the needs of today's high density interconnect applications. In one embodiment, the method of the present invention dispenses mechanical stresses in a high density interconnect printed wiring board substrate having a first patterned conductive layer formed over an upper surface of the substrate. The patterned conductive layer includes multiple conductive lines each having edges that define the boundaries of the conductive lines. The method of the invention forms a composite dielectric layer over the first patterned conductive layer and between the edges of the conductive layer. The composite dielectric layer includes particles suspended in the layer in order to reduce the likelihood and prevent any cracks that form in the layer from propagating through the entire length of the layer. A thin film conductive layer is then formed over the composite dielectric layer, and a thin film dielectric layer is formed over the thin film conductive layer. In a preferred embodiment, the composite dielectric layer is a CIBA PROBIMER™ layer deposited from a curtain coating process.
A method for forming a high density interconnect printed wiring board substrate having a first patterned conductive layer having a first thickness, including a plurality of conductive lines having edges that define boundaries of said conductive lines, formed over an upper surface of the substrate, said method comprising:
The method of claim, 1 wherein said stress buffer layer is a laser abatable material.
A method for fabricating a high density interconnect substrate, said method comprising:
A method of forming high density interconnect structure over a common circuit base having an upper major surface, a lower major surface and a thick film patterned conductive layer having a first thickness formed on said upper major surface, said thick film patterned conductive layer forming a plurality of thick film conductive lines having edges that define boundaries of said conductive lines, said method comprising:
A method of forming a high density interconnect structure over a common circuit base having an upper major surface, a lower major surface and a thick film patterned conductive layer having a first thickness formed on said upper major surface, said thick film patterned conductive layer forming a plurality of thick film conductive lines having edges that define boundaries of said conductive lines, said method comprising:
Dependencies are inferred from the claim text.