Process of producing plastic pin grid array

A method for making a plastic pin grid array comprising a circuitized laminate carrier having a top surface and a bottom surface, a centrally disposed dielectric material, and at least one transverse through-hole which defines an inner-surface with a corresponding at least one solid pin inserted therein and having a gold surface, the process including the steps of:

• disposing a first layer of copper on said inner surface of said at least one through-hole in said circuitized laminate carrier;
• disposing a second layer of gold on said first layer of copper;
• inserting at least one pin blank having a gold surface into at least one through-hole,
• deforming said at least one solid pin blank to form at least one pin with a gold surface which directly contacts substantially throughout said inner surface said second layer of gold, and
• extending said first layer of copper from said inner surface of said at least one through-hole to areas on said top and bottom surfaces of said circuitized laminate carrier surrounding said at least one through-hole, and plating a layer of gold on said copper surrounding said at least one through-hole to form a wire bond pad, said laminate carrier further including at least one conductor of a metal plane disposed in said dielectric material, wherein said at least one conductor is electrically connected to said gold on said first layer of copper.

A method for making plastic pin grid array comprising a circuitized laminate carrier having a top surface and a bottom surface, a centrally disposed dielectric material, and at least one transverse through-hole which defines an inner-surface with a corresponding at least one solid pin inserted therein and having a gold surface, the process including the steps of:

• disposing a first layer of copper on said inner surface of said at least one through-hole in said circuitized laminate carrier,
• disposing a second layer of nickel on said first layer of copper;
• disposing a third layer of gold on said second layer of nickel;
• inserting at least one solid pin blank having a gold surface into said at least one through-hole,
• deforming said at least one solid pin blank to form said at least one pin having a gold surface which directly contacts substantially throughout said inner surface said third layer of gold disposed on said second layer of nickel on said first layer of copper disposed on said inner surface of said at least one through-hole, and
• extending said layer of copper from said inner surface of said at least one through-hole to areas on said top and bottom surfaces of said circuitized laminate carrier surrounding said at least one through-hole, and sequentially plating a layer of nickel and a layer of gold on said copper surrounding said at least one through-hole to form a wire bond pad, said laminate carrier further including at least one conductor of a metal plane disposed in said dielectric material, wherein said at least one conductor is electrically connected to said gold on said second layer of nickel.