Microcode patch device and method for patching microcode using match registers and patch routines

A method for patching microcode in a processor, comprising:

• generating an address to access a microcode memory;
• comparing the address to values stored in one or more match registers;
• if the address does not match the value in any of the one or more match registers, the processor executing a microcode instruction line from said microcode memory as indicated by the address;
• and
• if the address matches the value in one of the one or more match registers, the processor executing a microcode patch routine stored in a patch memory.

A processor comprising:

• a microcode memory configured to store a plurality of microcode instruction lines, wherein an address is provided to said microcode memory, and wherein said microcode memory is further configured to provide the microcode instruction line indicated by the address to be executed;
• a patch memory configured to store one or more microcode patch routines, wherein each microcode patch routine is located in said patch memory at a fixed entry point, wherein each fixed entry point corresponds to a different address of said microcode memory to be patched;
• and
• a control unit configured to determine if said address provided to said microcode memory is for a microcode instruction line in said microcode memory that is to be patched, wherein if said address provided to said microcode memory is for a microcode instruction line in said microcode memory that is to be patched, said control unit causes the one of said one or more microcode patch routines from said patch memory located at the fixed entry point corresponding to the address provided to said microcode memory to be executed instead of the microcode instruction line in said microcode memory as indicated by the address provided to said microcode memory.