Silicon on insulator logic circuit utilizing diode switching elements
AssigneeAdvanced Micro Devices, Inc.
InventorBruce Alan Gieseke
Life of this patent
Estimating the term…
Abstract
A logic circuit is formed on a silicon on insulator (SOI) substrate in the thin silicon layer above the insulating buried oxide layer. The logic circuit utilizes both SOI field effect transistors (FETs) and SOI diodes to provide for reduced size of the logic circuit and reduced power consumption when the logic circuit is in operation. A method of performing certain logic function is also provided.
Claims13
A logic circuit, comprising:
- a) a substrate having a plurality of silicon-on-insulator regions within a thin semiconductor layer over an insulating layer of buried oxide;
- b) a plurality of logic gates formed among some of the plurality of silicon-on-insulator regions;
- c) a plurality of silicon on insulator diodes formed on others of the plurality of silicon-on-insulator regions and operatively coupled to an input terminal or an output terminal of at least one of the plurality of logic gates to control logic state switching among the plurality of logic gates.
A method of forming a logic circuit in a silicon-on-insulator wafer comprising:
- a) forming a plurality of SOI FETs and a plurality of SOI diodes in a thin silicon layer over a buried oxide layer in said wafer;
- and
- b) interconnecting the plurality of SOI FETs and SOI diodes to form a plurality of logic gates each with an output coupled to a cathode of each of the plurality of SOI diodes to isolate each of the logic gates from a logic low sink on an anode side of the SOI diode connected thereto and to sink a logic high charge on the anode side of the SOI diode to a logic low sink through the logic gate.
A logic circuit comprising:
- a) a substrate having a plurality of silicon-on-insulator regions within a thin semiconductor layer over an insulating layer of buried oxide;
- b) a plurality of diodes formed among some of the plurality of silicon-on-insulator regions, each diode including an anode and a cathode and operating as a logic element between a logic high potential and a logic low potential to:
- i) pull logic high on the anode to logic low in the event that the cathode is pulled to logic low;
- and
- ii) maintain logic high on the cathode independent of whether the anode is pulled to logic low.
The logic circuit of claim further comprising a plurality of logic gates formed in others of the plurality of silicon-on-insulator regions, the logic gates being operatively coupled among the plurality of diodes to pull at least one of the anode and the cathode of at least one of the plurality of diodes to at least one of logic high and logic low.
Dependencies are inferred from the claim text.