US 6,429,755 B2Granted

Method for constructing an encapsulated MEMS band-pass filter for integrated circuits

AssigneeInternational Business Machines Corporation

InventorsJames L. Speidell, James F. Ziegler

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Abstract

Integrated circuit fabrication technique for constructing novel MEMS devices, specifically band-pass filter resonators, in a manner compatible with current integrated circuit processing, and completely encapsulated to optimize performance and eliminate environmental corrosion. The final devices may be constructed of single-crystal silicon, eliminating the mechanical problems associated with using polycrystalline or amorphous materials. However, other materials may be used for the resonator. The final MEMS device lies below the substrate surface, enabling further processing of the integrated circuit, without protruding structures. The MEMS device is about the size of a SRAM cell, and may be easily incorporated into existing integrated circuit chips. The natural frequency of the device may be altered with post-processing or electronically controlled using voltages and currents compatible with integrated circuits.

Claims15

Dependent claims

A method for constructing an integrated circuit encapsulated resonator device of single crystal silicon formed on a silicon-on-insulator (SOI) substrate comprising the steps of:

a) forming a top silicon layer, and an intermediate layer of SiO2 on said substrate;
b) depositing a layer of SiO2 on the top silicon layer;
c) opening a first mask and creating a conductive structure in said top silicon layer, said conductive structure having dimensions of a resonator device to be formed;
d) opening a second mask and depositing a metal layer on top of said layer of SiO2 on the surface silicon layer in substantial alignment with said conductive structure and having dimensions corresponding to said resonator device;
e) opening a third mask transverse to said conductive structure and said metal layer in said silicon surface layer to define a length of said resonator device, and etching first and second trenches at respective first and second sides of said metal layer and conductive structure down through the top SiO2 layer, the top silicon layer and, the intermediate layer of SiO2;
f) opening a fourth mask corresponding in area to said third mask and forming a well structure by etching down to remove the SiO2 and the intermediate layer of SiO2 above and below said conductive structure;
and,
g) depositing SiO2 onto the structure commensurate in thickness to that of said well structure etched in step f) for filling said well on both said first and second sides of said conductive structure and said metal layer, wherein said conductive structure forms said encapsulated resonator device lying entirely within a vacuum in alignment with said top metal layer and operates by capacitively coupling an input signal provided at said metal layer to said resonator device.

5 more elements

A method for constructing an integrated circuit encapsulated resonator device comprising the steps of:

a) opening an area on a substrate and etching a trench;
b) depositing a lower release layer of SiO2 in said trench;
c) depositing one or more intermediate layers of material to be used as said resonator device on top of said lower release layer in said trench, one of said intermediate layers being a surface silicon layer;
d) depositing an upper release layer of SiO2 on top said one or more layers of material in said trench;
e) opening a first mask and creating a conductive structure in said surface silicon layer, said conductive structure having dimensions of a resonator device to be formed;
f) opening a second mask and depositing a metal layer on top of said upper release layer on the surface silicon layer in substantial alignment with said conductive sure and having dimensions corresponding to said resonator device;
g) opening a third mask transverse to said conductive structure and said metal layer in said silicon surface layer to define a length of said resonator device, and etching first and second trenches at respective first and second sides of said metal layer and conductive structure down through the upper release layer, the one or more intermediate layers of material, and, the lower release layer.
h) opening a fourth mask corresponding in area to said third mask and forming a well structure by etching down to remove the upper and lower release layers above and below said conductive structure;
and,
i) depositing SiO2 onto the structure commensurate in thickness to that of said well structure etched in step h) for filling said well on both said first and second sides of said conductive structure and said metal layer, wherein said conductive structure forms said encapsulated resonator device lying entirely within a vacuum in alignment with said top metal layer and operates by capacitively coupling an input signal provided at said metal layer to said resonator device.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/772,459Filed 30 Jan 2001 · division
Priority: 17 Aug 1999
Published: US 2001/0020878 A113 Sep 2001
Granted: 6 Aug 2002
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

H03H 3/0072
For the manufacture of electromechanical resonators or networks: of microelectro-mechanical resonators or networks
H03H 3/0073
Of microelectro-mechanical resonators or networks: integration with other electronic structures
H03H 9/02409
Post-fabrication trimming of parameters, e.g. resonance frequency, Q factor: by application of a DC-bias voltage
H03H 9/1057
Mounting in enclosures: for microelectro-mechanical devices