Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks

A method of managing a non-volatile flash memory system having its memory cells organized into distinct blocks of simultaneously erasable cells, comprising:

• storing within individual ones of said blocks at least one sector of data including user data, a redundancy code generated from the user data and a plurality of bits at a beginning of the sector that define a function by which the user data and redundancy code are transformed prior to being stored, and
• storing at least one characteristic of said individual ones of said blocks in at least one block other than said individual ones of said blocks, said at least one other block storing said at least one characteristic of a plurality of said blocks storing user data.

A memory system, comprising:

• an array of non-volatile memory cells formed in blocks of cells that are simultaneously erasable together, a first plurality of the blocks being designated to store user data and a second plurality of the blocks being designated to individually store records of characteristics of first plurality of blocks,
• a controller memory separate from the array of non-volatile memory cells in which at least some of the records from the second plurality of the blocks are temporarily stored, said controller memory being characterized by having a faster access time than that of the non-volatile memory cell array, and
• a controller adapted to communicate sectors of user data between a host and the first plurality of the memory cell blocks while utilizing records in the controller memory from the second plurality of blocks that correspond to those of the first plurality of blocks with which user data are communicated.

A memory system, comprising:

• at least two non-volatile memory cell arrays formed on at least two respective integrated circuit chips, wherein the memory cells of each of the memory cell arrays are grouped into a number of blocks designated to individually store a given quantity of user data, and further wherein the number of such available blocks is different in individual ones of said at least two memory cell arrays,
• a memory controller, and
• a record stored in the memory system which contains non-overlapping logical address assignments of the blocks of each of the memory cell arrays, thereby to allow the controller to determine from a logical block address which of the memory arrays a corresponding physical block lies.

A method of manufacturing a memory system, comprising:

• installing and interconnecting at least first and second integrated circuit chips that individually include an array of non-volatile memory cells, wherein said at least first and second integrated circuit chips individually contains stored therein a record of at least a number of blocks of capacity of its memory cell array for storing user data, and
• merging the memory array capacity records of each of said at least first and second integrated circuit chips to form a merged record on said first integrated circuit chip of contiguous ranges of logical memory block addresses assigned to the memory cell arrays of each of the at least first and second integrated circuit chips.

A method of operating a flash EEPROM system having its memory cells organized into distinct blocks of a number of simultaneously erasable cells capable of storing a given quantity of data, comprising:

• providing the memory system with a controller and a plurality of physically distinct arrays of said memory cells that are individually organized into said memory blocks,
• storing in one of the memory blocks a record of a number of blocks available in each of said plurality of memory cell arrays for storing user data and non-overlapping ranges of contiguous logical addresses assigned to said number of user data blocks of the individual memory cell arrays, and
• locating a physical address of a memory cell block at least in part by accessing the record with a logical memory cell block address in order to determine one of the plurality of memory cell arrays in which the addressed memory cell block resides.

A method of operating a re-programmable memory system having non-volatile memory cells organized into distinct blocks of a number of simultaneously erasable cells capable of storing a given quantity of data, the blocks of cells being further organized into a plurality of units, comprising:

• receiving and temporarily storing at least a given number of sectors of user data to be programmed into the memory system,
• simultaneously programming a chunk of user data from each of the given number of temporarily stored sectors of user data into different blocks of memory cells within a number of different memory cell units equal to said given number, each chunk being a fraction of a sector of user data equal to one-half or less, and
• repeating the simultaneous programming of chunks of user data until all the data of each of the given number of temporarily stored sectors has been programmed into the different blocks within the given number of memory cell units.

A method of operating a re-programmable memory system having non-volatile memory cells organized into distinct blocks of a number of simultaneously erasable cells capable of storing a given quantity of data, the blocks of cells being further organized into a plurality of units, comprising:

• receiving and temporarily storing in a buffer memory at least a given number of sectors of user data to be programmed into the memory system,
• moving data in a stream from one of the given number of sectors of user data in the buffer at a time to a respective one of a given number of storage registers at a time, and
• thereafter moving the user data from th given number of storage registers in parallel to respective ones of a given number of memory cell blocks that are located within different ones of a given number of said units.

A method of operating a re-programmable non-volatile memory system having its memory cells organized into distinct blocks of simultaneously erasable cells, comprising:

• identifying a first group of said blocks for storing user data and a second group of said blocks for storing information of the characteristics of said first group of blocks,
• storing, in individual ones of the first group of said blocks, user data without data of the characteristics of said first group of blocks, and
• storing, in individual ones of the second group of said blocks, a plurality of records of characteristics of individual ones of the first group of blocks but without storing user data in the second group of blocks.

A method of operating a re-programmable memory system having non-volatile memory cells organized into distinct blocks of simultaneously erasable cells, comprising:

• storing user data in a first group of a plurality of less than all of said blocks, and
• storing, in each of one or more others of said blocks in a second group, a plurality of records that each contains data of any one or more programming, reading, erasing or wear characteristics of a corresponding block within the first group of blocks.