Multi-level quantizer with current mode DEM switch matrices and separate DEM decision logic for a multibit sigma delta modulator

A sigma-delta moldulator, comprising:

• a loop filter having an input node for receiving an analog signal and an output node;
• a multilevel quantizer having an imput node coupled to said output node of said loop filter for receiving an input signal therefrom and a plurality of digital output nodes outputting a multibit digital signal that is indicative of a magnitude of said input signal;
• and
• a feedback path from said plurality of digital output nodes of said quantizer to said loop filter, said feedback path comprising at least one dynamic element matching (DEM) switching matrix in series with said feedback path for reordering said multibit digital signal, and a DEM algorithm logic block logic block having outputs coupled to said DEM switching matrix for controlling the operation thereof, said DEM algorithm logic block having an input coupled to said plurality of digital output nodes of said quantizer and being coupled in parallel with at least a portion of said feedback path, and further comprising a dither signal generator having an output coupled to a second input node of said quantizer for introducing a dither signal into said input signal.

A sigma-delta modulator, comprising:

• a loop filter having in input node for receiving an analog signal and an output node;
• a multilevel quantizer having an input node coupled to said output node to said loop filter for receiving an input signal therefrom and a plurality of digital output nodes outputtting a multibit digital signal that is indicative of a magnitude of said input signal;
• and
• a feedback path from said plurality of digital output nodes of said quantizer to said loop filter, said feedback path comprising at least one dynamic element matching (DEM) switching matrix in series with said feedback path for recording said multibit digital signal, and a DEM algorithm logic block having outputs coupled to said DEM switching matrix for controlling the operation thereof, said DEM algorithm logic block having an input coupled to said plurality of digital output nodes of said quantizer and being coupled in parallel with at least a portion of said feedback path, wherein said at least one DEM switching matrix is a current mode DEM switching matrix that is located between said input node and said plurality of output nodes of said quantizer.

An N-level quantizer circuit, said quantizer circuit having an analog input terminal and N−1 digital output terminals, comprising:

• a sampling circuit coupled to said input terminal for providing a sampled input voltage signal;
• at least one preamplifier/converter stage for converting said sampled input voltage signal to a sampled input current signal;
• N−1 comparator stages each having an input coupled to an output of said at least one preamplifier/converter stage, individual ones of said N−1 comparator stages operating to equally share said sampled input current signal and to compare said current signal to an associated one of N−1 reference current signals;
• N−1 latches individual ones of which latch an output state of one of said N−1 comparators and having an output coupled to one of said N−1 digital output terminals of said quantizer circuit;
• at least one current mode dynamic element matching (DEM) switching matrix operating to reorder a multibit digital signal appearing at said N−1 digital output terminals of said quantizer circuit;
• and
• a DEM algorithm logic block having outputs coupled to said at least one current mode DEM switching matrix for controlling the operation thereof.

A method for operating a quantizer of a sigma-delta modulator, comprising steps of:

• sampling and converting an integrated input signal to a sampled current signal;
• adding a dither current signal to the sampled current signal to generate a dithered sampled current signal;
• coupling the dithered sampled current signal to an input terminal of individual ones of N−1 comparator stages;
• dividing the dithered sampled current signal equally amongst the N−1 comparator stages;
• operating individual ones of the N−1 comparator stages to compare a divided portion of the dithered sampled current signal to an associated one of N−1 reference current signals;
• and
• latching an output of each of the N−1 comparator stages with one of N−1 latches;
• wherein
• operating individual ones of the N−1 comparator stages includes operating at least one current mode dynamic element matching (DEM) switching matrix to reorder a multibit digital signal appearing at N−1 digital output terminals of a quantizer circuit, under control of a DEM algorithm logic block.

A sigma-delta modulator, comprising:

• a loop filter having an input node for receiving an analog input signal and an output node;
• a multilevel quantizer having an input node coupled to said output node of said loop filter for receiving an input signal therefrom and a plurality of digital output nodes outputting a multibit digital signal that is indicative of a magnitude of said input signal, said multilevel quantizer comprising at least one of a current mode or a voltage mode dynamic element matching (DEM) switching matrix coupled between said quantizer input node and said plurality of quantizer output nodes;
• and
• a feedback path from said plurality of digital nodes of said quantizer to said loop filter, said feedback path comprising a DEM algorithm logic block having outputs coupled to said DEM switching matrix for controlling the operation thereof.