SOI DRAM having P-doped polysilicon gate for a memory pass transistor
AssigneeTexas Instruments Incorporated
InventorTheodore W. Houston
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Abstract
An integrated circuit including a DRAM is disclosed, wherein the DRAM includes a memory array including a plurality of pass gate transistors and a plurality of memory elements. The pass gate transistors include a gate material selected to provide a substantially near mid-gap work function or greater. The DRAM also includes a peripheral area including a plurality of logic transistors. In a preferred embodiment the pass gate transistors are silicon-on-insulator transistors.
Claims23
An integrated circuit including a DRAM, said DRAM comprising:
- a memory array including a plurality of pass gate transistors and a plurality of memory elements;
- said pass gate transistors each having a gate material selected to provide a substantially near mid-gap work function or greater;
- and
- a peripheral area including a plurality of logic transistors.
An integrated circuit including a DRAM device, said DRAM device comprising:
- a memory array including a plurality of pass gate transistors and a plurality of memory elements;
- said pass gate transistors each comprising n-channel devices having P+ doped polysilicon gate regions and fully depleted channel regions;
- and
- a peripheral area including a plurality of logic transistors, said logic transistors each having partially depleted channel regions.
An integrated circuit including a DRAM device, said DRAM comprising:
- a memory array including a plurality of pass gate transistors and a plurality of memory elements;
- said pass gate transistors comprising n-channel devices having P+ doped polysilicon gate regions;
- and
- a peripheral area including a plurality of logic transistors.
Dependencies are inferred from the claim text.