Method and apparatus for forming an integrated circuit electrode having a reduced contact area
AssigneeMicron Technology, Inc.
InventorSteven T. Harshfield
Life of this patent
Estimating the term…
Abstract
A method and an apparatus for manufacturing a memory cell having a non-volatile resistive memory element with a limited size active area. The method comprises a first step of providing a dielectric volume and forming a plug opening within the dielectric volume. A recessed plug of a conductive material is then formed within a lower portion of the opening and a dielectric spacer is formed along the sidewalls of an upper portion of the opening. The spacer is cylindrical and has a central hole. A contact plug is subsequently formed within the central hole, the contact plug electrically coupled to the recessed plug. The contact plug can include a memory element or an additional memory element can be applied over the contact plug.
Claims2
A memory device having at least one memory cell, said memory cell having a storage element comprising:
- a first dielectric member having a first aperture therein, said first aperture having a first portion and a second portion;
- a first conductive member disposed within said first portion of said first aperture;
- a dielectric spacer formed within said second portion of said first aperture, said dielectric spacer defining a second aperture within said second portion of said first aperture;
- a second conductive member disposed within said second aperture;
- and
- a layer of memory material disposed on said first dielectric member and on said second conductive member.
Dependencies are inferred from the claim text.