Deep sub-micron static timing analysis in the presence of crosstalk

A computer-readable medium having contained therein computer-readable codes for causing a computer-implemented electronics design automatic (EDA) to perform a method of analysing crosstalk effects on interconnects of an integrated circuit design represented as a netlist, the method comprising the steps of:

• a) accessing a netlist and identifying a cross-coupled circuit contained therein, wherein said cross-coupled circuit includes a primary net and an aggressor net;
• b) generating a primary waveform for said cross-coupled circuit;
• c) generating a bump-envelope waveform of said cross-coupled circuit;
• d) super-positioning said primary waveform over said bump-envelope waveform to generate a composite waveform;
• e) determining a threshold voltage crossing point of said composite waveform;
• and
• f) determining a worst case aggressor switching time based on said threshold voltage crossing point.

A computer-implemented electronics design automation (EDA) system comprising:

• means for accessing a netlist representative of an integrated circuit design;
• means for identifying a cross-coupled circuit contained within said netlist, wherein said cross-coupled circuit includes a primary net and an aggressor net;
• first simulation means for generating a primary waveform of said cross-coupled circuit;
• second simulation means for generating a bump-envelope waveform of said cross-coupled circuit;
• means for super-positioning said primary waveform over said bump-envelope waveform to generate a composite waveform;
• first calculation means for determining a threshold voltage crossing point of said composite waveform;
• and
• second calculation means for determining a worst case aggressor switching time based on said threshold voltage crossing point.

In a computer system, a method of analysing crosstalk effects on interconnects of an integrated circuit design represented as a netlist, the method comprising the steps of:

• a) accessing a netlist and identifying a cross-coupled circuit contained therein, wherein said cross-coupled circuit includes a primary net and a plurality of aggressor nets;
• b) generating a primary waveform of said cross-coupled circuit;
• c) generating bump-envelope waveforms of said cross-coupled circuit;
• d) generating an accumulative bump-envelope by super-positioning said bump-envelope waveforms;
• e) super-positioning said primary waveform over said accumulative bump-envelope to generate a composite waveform;
• f) determining a threshold voltage crossing point of said composite waveform;
• and
• g) determining a plurality of worst case aggressor switching times each corresponding to a respective one of said plurality of aggressor nets based on said threshold voltage crossing point.