Linear low noise phase loop frequency synthesizer using controlled divider pulse widths

A composite phase frequency detector (PFD) for determining a phase difference between a reference signal and an input signal, the composite phase frequency detector comprising:

• a digital PFD having a dead zone, the said dead zone being a time range when the digital PFD has no output;
• an analog phase detector (PD) with a PD window and a PD output, said PD window being a time range when the analog PD operates linearly;
• and
• a converter coupled to receive both a digital PFD output and a PD output;
• wherein
• an output of the converter is the CFPD output;
• the digital PFD is coupled to receive the reference signal and the input signal;
• the analog PD is coupled to receive the reference signal and the input signal;
• the digital PFD output indicates a presence and a magnitude of a phase difference between the reference signal and the input signal when the digital PFD is not in the dead zone;
• the analog PD output is proportional to the phase difference between the reference signal and the input signal when the analog PD is within the PD window;
• the dead zone is within the PD window;
• and
• said digital PFD output being larger in magnitude than the analog PD output when the digital PFD is not in the dead zone.

An analog phase detector (analog PD) for detecting differences in phase between a reference signal and an input signal, the analog PD comprising:

• a NOT gate coupled to receive the reference signal and having an output;
• a first AND gate coupled to receive the output of the NOT gate and the input signal, said first AND gate having an output;
• a second AND gate coupled to receive the reference signal and the input signal, said second AND gate having an output;
• and
• a subtractor circuit coupled to receive the output of the first AND gate and the output of the second AND gate, said subtractor circuit having an output which is the difference between the output of the first AND gate and the output of the second AND gate;
• wherein the output of the subtractor is the analog PD output.

A digital phase frequency detector (digital PFD) for detecting differences in phase and frequency between a reference signal and an input signal, the digital PFD comprising:

• a phase frequency detector coupled to receive the reference signal and the input signal, the PFD producing a pump up signal and a pump down signal, said pump up signal and pump down signal being produced depending on the presence and magnitude of a phase difference between the input signal and the reference signal;
• a PFD NOT gate coupled to receive the input signal;
• a first PFD AND gate coupled to receive an output of the PFD NOT gate and the pump up signal from the PFD;
• a second PFD AND gate coupled to receive the output of the PFD NOT gate and the pump down signal from the PFD;
• and
• a combiner coupled to receive the output of the first PFD AND gate and the output of the second PFD AND gate, said combiner producing the digital PFD output based on the output of the first PFD AND gate and the output of the second PFD AND gate.

A frequency divider for dividing the frequency of an input signal, the divider having a divider output and comprising:

• a 2×1 multiplexer coupled to receive:
• a divide ratio signal;
• a pulse width signal;
• and
• the divider output;
• said multiplexer multiplexing between the divide ratio signal and the pulse width signal to produce a multiplexer output, said multiplexing being determined by the divider output;
• a synchronous counter coupled to receive the multiplexer output and the input signal, said counter being constructed and arranged to conduct a count down from a value determined by the multiplexer output with the input signal providing a clock signal, said counter producing a count pulse when the count down is terminated;
• and
• a T flip-flop coupled to receive the count pulse from the synchronous counter and further coupled to receive the input signal as the clock signal, the T flip-flop having an output which is the divider output.

A method of compensating for and detecting phase differences between a reference signal and a subject signal with a controllable pulse width using:

• an analog phase detector having a phase detector window in which the analog phase detector is active during the phase detector window, the analog phase detector receiving the reference signal and the subject signal;
• a digital phase frequency detector having a dead zone in which the digital phase frequency detector is inactive during the dead zone, the digital phase frequency detector receiving the reference signal and the subject signal;
• and
• a divider producing the subject signal with a controllable pulse width signal,
• the method comprising:
• controlling the controllable pulse width of the subject signal and synchronizing the phase detector window and the dead zone such that:
• the phase detector window and the dead zone are both within an active pulse of the subject signal.