Junction profiling using a scanning voltage micrograph

Abstract

A method is provided for obtaining an accurate image of a two-dimensional junction profile of a semiconductor device. Embodiments include sectioning a sample to be analyzed through the active transistor, either at a 90° angle to the planar surface or at a desired angle, as by a focused ion beam (FIB) apparatus. The sectioned transistor can be analyzed directly on the exposed silicon, or the exposed silicon of the cross-section can be passivated with a thin film material such as silicon dioxide, or with an undoped semiconductor material such as silicon or germanium. The electrodes (i.e., source, gate, drain and substrate electrodes) of the sample active transistor are then connected so they can be individually electrically biased. A direct current (DC) potential is imposed on an active region of the prepared sample, and a small alternating current (AC) potential is imposed on the DC potential. The active region is then scanned using a conventional atomic force micrograph (AFM) or scanning capacitance micrograph (SCM) tip as an AC signal detector to generate an accurate image of the active region.

Dependencies are inferred from the claim text.