High slew rate differential amplifier circuit

A high slew rate differential amplifier circuit, comprising:

• a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal (+) and inverted input terminal (−) connected to an input thereof;
• an N-type current mirror circuit driven by an output from said P-type differential input section;
• a P-type current mirror circuit driven by an output from said N-type differential input section;
• a push pull output tier having a P-type output transistor driven by an output from said P-type current mirror circuit and an N-type output transistor driven by an output from said N-type current mirror circuit;
• a first sub-current source in which a P-type constant current source transistor is connected in series with a P-type transistor having a gate voltage of said P-type output transistor input to a gate thereof and these transistors are connected in parallel with the constant current source transistor of said P-type differential input section;
• and
• a second sub-current source in which an N-type constant current source transistor is connected in series with an N-type transistor having a gate voltage of said N-type output transistor input to a gate thereof and these transistors are connected in parallel with a constant current source transistor of said N-type differential input section.

A high slew rate differential amplifier circuit comprising:

• a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal (+) and inverted input terminal (−) connected to an input thereof;
• an N-type current mirror circuit driven by an output from said P-type differential input section;
• a P-type current mirror circuit driven by an output from said N-type differential input section;
• an output tier driven by an output from said N-type current mirror circuit and an output from said P-type current mirror circuit;
• and
• a sub-current source comprising a current source circuit including a constant current source transistor and a transistor connected in series therewith and having a gate voltage of said output tier input to a gate thereof, the current source circuit being connected to a constant current source transistor of said P-type differential input section or said N-type differential input section, in such a manner that the polarity of an output from the current source circuit is inverted via current mirror circuits.

A high slew rate differential amplifier circuit comprising:

• a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal (+) and inverted input terminal (−) connected to an input thereof;
• an N-type current mirror circuit driven by an output from said P-type differential input section;
• a P-type current mirror circuit driven by an output from said N-type differential input section;
• a push pull output tier having a P-type output transistor driven by an output from said P-type current mirror circuit and an N-type output transistor driven by an output from said N-type current mirror circuit;
• a first sub-current source comprising a current source circuit including a P-type constant current source transistor and a P-type transistor connected in series therewith and having a gate voltage of said P-type output transistor input to a gate thereof, the current source circuit being connected in parallel with a constant current source transistor of said N-type differential input section, in such a manner that polarity of the current source circuit is inverted by current mirror circuits;
• and
• a second sub-current source comprising a current source circuit including an N-type constant current source transistor and an N-type transistor connected in series therewith and having a gate voltage of said N-type output transistor input to a gate thereof, the current source circuit being connected in parallel with a constant current source transistor of said P-type differential input section, in such a manner that polarity of the current source circuit is inverted by current mirror circuits.

A high slew rate differential amplifier circuit comprising:

• a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal (+) and inverted input terminal (−) connected to an input thereof;
• an N-type current mirror circuit driven by an output from said P-type differential input section;
• a P-type current mirror circuit driven by an output from said N-type differential input section;
• an output tier driven by an output from said N-type current mirror circuit and an output from said P-type current mirror circuit;
• and
• a sub-current source in which a current source circuit including a transistor having a gate voltage of said output tier input to a gate thereof is connected to a constant current source transistor of said P-type differential input section or said N-type differential input section in such a manner that the polarity of an output from the current source circuit is inverted via current mirror circuits.

A high slew rate differential amplifier circuit, comprising:

• a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal (+) and inverted input terminal (−) connected to an input thereof;
• an N-type current mirror circuit driven by an output from said P-type differential input section;
• a P-type current mirror circuit driven by an output from said N-type differential input section;
• a push pull output tier having a P-type output transistor driven by an output from said P-type current mirror circuit and an N-type output transistor driven by an output from said N-type current mirror circuit;
• a first sub-current source in which a current source circuit including a P-type transistor having a gate voltage of said P-type output transistor input to a gate thereof is connected in parallel with a constant current source transistor of said N-type differential input section in such a manner that polarity of the current source circuit is inverted by current mirror circuits;
• and
• a second sub-current source in which a current source circuit including an N-type transistor having a gate voltage of said N-type output transistor input to a gate thereof is connected in parallel with a constant current source transistor of said P-type differential input section in such a manner that polarity of the current source circuit is inverted by current mirror circuits.