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US 6,392,275 B1Granted
Semiconductor device with DMOS, BJT and CMOS structures
AssigneeFairchild Korea Semiconductor Ltd.
InventorYoung-soo Jang
Life of this patent
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Abstract
A semiconductor device having a substrate composed of a DMOS transistor, a complementary MOS (CMOS) transistor and a bipolar junction transistor is disclosed. A highly-doped bottom layer is formed on a lower edge of a body region of the DMOS transistor, a heavily doped bottom layer of a conductivity type opposite to that of the substrate is formed on a lower edge of source and drain regions of the CMOS transistor, and a highly-doped bottom layer of the same conductivity type as that of the substrate is formed on a lower portion of an intrinsic base region of the bipolar junction transistor, to thereby enhance the electrical characteristics of devices.
Claims5
A semiconductor device including a bipolar junction transistor and a DMOS transistor formed on a semiconductor substrate of a first conductivity type,
- wherein the DMOS transistor comprises:
- a body region of the first conductivity type and a well region of a second conductivity type formed in a predetermined upper region of the semiconductor substrate, wherein the body region and the well region are spaced apart by a predetermined interval;
- a highly-doped bottom layer of the first conductivity type to contact the lower surface of the body region in the semiconductor substrate;
- a highly-doped source region of the second conductivity type formed in a predetermined upper region of the body region;
- a highly-doped drain region of a second conductivity type formed in a predetermined upper region of the well region;
- a gate electrode formed on a channel formation region of the body region wherein an insulating layer is interposed between the gate electrode and the body region;
- a source electrode electrically connected to the source region;
- and
- a drain electrode electrically connected to the drain region.
6 more elements
A semiconductor device including a bipolar junction transistor and a DMOS transistor formed on a semiconductor substrate of a first conductivity type,
- wherein the DMOS transistor comprises:
- a body region of the first conductivity type and a well region of a second conductivity type formed in a predetermined upper region of the semiconductor substrate, wherein the body region and the well region are spaced by a predetermined interval;
- a highly-doped bottom layer of the first conductivity type to contact the lower surface of the body region in the semiconductor substrate;
- a highly-doped source region of the second conductivity type formed in a predetermined upper region of the body region;
- a highly-doped drain region of a second conductivity type formed in a predetermined upper region of the well region;
- a gate electrode formed on a channel formation region of the body region wherein an insulating layer is interposed between the gate electrode and the body region;
- a source electrode electrically connected to the source region;
- a drain electrode electrically connected to the drain region;
- and
- further comprising a top region of the first conductivity type formed in an upper portion of the well region.
7 more elements
A semiconductor device including a bipolar junction transistor and a DMOS transistor formed on a semiconductor substrate of a first conductivity type,
- wherein the DMOS transistor comprises:
- a body region of the first conductivity type and a well region of a second conductivity type formed in a predetermined upper region of the semiconductor substrate, wherein the body region and the well region are spaced by a predetermined interval;
- a highly-doped bottom layer of the first conductivity type to contact the lower surface of the body region in the semiconductor substrate;
- a highly-doped source region of the second conductivity type formed in a predetermined upper region of the body region;
- a highly-doped drain region of a second conductivity type formed in a predetermined upper region of the well region;
- a gate electrode formed on a channel formation region of the body region wherein an insulating layer is interposed between the gate electrode and the body region;
- a source electrode electrically connected to the source region;
- a drain electrode electrically connected to the drain region;
- and;
- wherein the bipolar junction transistor comprises:
- a well region of the first conductivity type formed in a predetermined upper portion of the semiconductor substrate;
- a highly-doped bottom layer of the first conductivity type formed in a predetermined region of the well region;
- a first base region of the first conductivity type contacting the upper surface of the bottom layer in the well region;
- a highly-doped second base region of the first conductivity type contacting the upper portion of the bottom layer in the first base region;
- a highly-doped emitter region of the second conductivity type formed in a part of the surface of the first base region;
- and
- a base electrode, an emitter electrode and a collector electrode electrically connected to the second base region, the emitter region and the collector region.
14 more elements
A semiconductor device including a MOS transistor and a DMOS transistor formed on a substrate of a first conductivity type,
- wherein the DMOS transistor comprises:
- a body region of the first conductivity type and a well region of a second conductivity type formed in a predetermined upper region of the semiconductor substrate, spaced by a predetermined interval;
- a highly-doped bottom layer of the first conductivity type to contact a lower surface of the body region in the semiconductor substrate;
- a highly-doped source region of the second conductivity type formed in a predetermined upper region of the body region;
- a highly-doped drain region of the second conductivity type formed in a predetermined upper portion of the well region;
- a gate electrode formed on a channel formation region of the body region wherein an insulating layer is interposed between the gate electrode and the body region;
- a source electrode to be electrically connected to the source region;
- a drain electrode to be electrically connected to the drain region.
5 more elements
A semiconductor device including a bipolar junction transistor and a DMOS transistor formed on a semiconductor substrate of a first conductivity type,
- wherein the DMOS transistor comprises:
- a body region of the first conductivity type and a well region of a second conductivity type formed in a predetermined upper region of the semiconductor substrate, wherein the body region and the well region are spaced by a predetermined interval;
- a highly-doped bottom layer of the first conductivity type to contact the lower surface of the body region in the semiconductor substrate;
- a highly-doped source region of the second conductivity type formed in a predetermined upper region of the body region;
- a highly-doped drain region of a second conductivity type formed in a predetermined upper region of the well region;
- a gate electrode formed on a channel formation region of the body region wherein an insulating layer is interposed between the gate electrode and the body region;
- a source electrode electrically connected to the source region;
- a drain electrode electrically connected to the drain region;
- and;
- wherein the MOS transistor comprises:
- a highly-doped bottom layer of a first conductivity type formed in a predetermined upper region of the semiconductor substrate;
- highly-doped source and drain regions of a second conductivity type contacting the upper portion of the bottom layer and spaced apart by a predetermined interval;
- a gate electrode insulated to a channel formation region between the source region and the drain region by an insulting layer;
- and
- source and drain electrodes electrically connected to the source region and the drain region.
12 more elements
Dependencies are inferred from the claim text.