Optimizing repeaters positioning along interconnects
AssigneeSilicone Graphics Inc.
InventorsSudhakar Muddu, Egino Sarto
Life of this patent
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AssigneeSilicone Graphics Inc.
InventorsSudhakar Muddu, Egino Sarto
Estimating the term…
An aspect of interconnect design for optimizing delay characteristics of interconnects. The interconnect design for delay characteristics optimization is performed using a method for optimizing repeaters positioning along interconnects. The method includes inserting repeaters in positions along a first interconnect at predetermined intervals that are related to signals transition time. The method further includes inserting repeaters in positions along a second interconnect at the predetermined intervals, the second interconnect being a neighbor of the first interconnect. The positions of repeaters along the second interconnect are offset, by a predetermined length, relative to the positions of repeaters along the first interconnect so that the repeaters positions along the second interconnect are shifted relative to the repeaters positions along the first interconnect. In one embodiment, the predetermined length is half (0.5) of the predetermined interval such that repeaters are shifted by half, wherein the interconnect delay that corresponds to the offsetting by half of the predetermined interval minimizes the interconnect delay under worst case conditions. The repeaters are inserted to decrease interconnect delay and make the interconnect delay scale linearly with an interconnect length.
A method of analyzing delay characteristics of interconnects, comprising:
Dependencies are inferred from the claim text.