Concurrent write duplex device

A concurrent write duplexing device with extension of memory bus in a tightly coupled fault tolerance system which has active and standby modules for performing real time of service supply and, if any fault in the active module occurs, changes the standby module to be in an active operation mode to continually perform a control function thereof, by maintaining memory contents between the active module and the standby module to be same as each other, wherein each of said active module and said standby module has said duplexing device, said device comprising:

• a primary memory having a first memory in which operating system and application program are loaded to maintain data consistency between the active module and the standby module and changed information is stored and having a first memory controller for controlling said first memory;
• a secondary memory having a second memory in which the operating system is loaded to execute an input/output of the standby module during an duplexing operation and to change an operation mode of the standby module to the active module upon failure of duplexing separation and having a second memory controller for controlling said second memory;
• a bus transceiver part for exchanging data with a CPU through a system bus and bus transceivers each installed in said first memory controller and said second memory controller to determine as to whether said first and second memory controller operate;
• and
• a memory switch part for exchanging data between the active module and the standby module and having memory switches which set direction of memory bus in accordance with an operation mode of module, so that write operation performed in said memory controller of the active module will be executed in the standby module with the same contents and a memory switch controller for controlling said memory switches.