Method for controlling out of order accessing to a multibank memory

A method of controlling a multibank memory, comprising:

• receiving a first request, a second request, and a third request;
• applying the first request to the memory;
• determining if the second request is a page hit;
• and
• if the second request is a page hit, then:
• storing the second request to one of a plurality of rank registers, the one of the plurality of rank registers being selected based on at least one of a read latency characteristic or a write latency characteristic of the multibank memory;
• determining if the third request creates a bank conflict;
• if the third request does not create a bank conflict, then applying the third request to the memory before applying the second request to the memory;
• determining if the second request creates a bank conflict;
• and
• when the second request does not create a bank conflict, then applying the second request to the memory.

In a memory controller operable to receive data transfer requests directed to a memory having a plurality of banks, a method of controlling request execution timing, comprising:

• receiving a first request directed to a first page in a first of the banks;
• receiving a second request directed to the first page in the first bank;
• receiving a third request directed to a second of the banks;
• initiating execution of the first request;
• storing the second request to one of a plurality of rank registers, the one of the plurality of rank registers being selected based on at least one of a read latency characteristic or a write latency characteristic of the memory;
• initiating execution of the third request prior to initiating execution of the second request;
• monitoring the execution of the first request;
• and
• initiating execution of the second request after the execution of the first request has progressed to a predetermined extent.

A method of controlling operations in a memory having a plurality of banks, each having a plurality of pages, the memory operable to register commands and requiring a minimum page time interval between successive registration of commands directed to a same page in one of the banks, the method comprising:

• registering a first command addressed to a first one of the pages in a first one of the banks;
• holding a second command addressed to the first page in the first bank, the second command being held in one of a plurality of rank registers, the one of the plurality of rank registers being selected based on at least one of a read latency characteristic or a write latency characteristic of the memory;
• registering a third command addressed to a second of the banks prior to elapse of the page time interval;
• and
• registering the second command after elapse of the page time interval.

A method of controlling a multibank memory, comprising:

• receiving a first request directed to a first bank of the memory;
• receiving a second request directed to the first bank;
• determining if the second request is a page hit;
• and
• if the second request is a page hit, storing the second request to one of a plurality of rank registers, the one of the plurality of rank registers being selected based on at least one of a read latency characteristic or a write latency characteristic of the multibank memory.