Microprocessor having addressable communication port

A method for operating a computer system that includes a microprocessor and at least one other device on a single integrated circuit chip that can be connected to an external computer device the integrated circuit chip comprising:

• an on-chip CPU with a plurality of registers;
• a communication bus for providing a parallel communication path between the CPU and a first memory local to the CPU;
• and
• an external communication port connected to the communication bus, the port having an internal connection to the communication bus with an internal parallel signal format wherein a first number of bits are carried in parallel and an external connection to the external computer device with an external format wherein fewer than the first number of bits are carried in parallel, the port forming part of a memory address space of the CPU from which instructions can be fetched, whereby the port is capable of being addressed by execution of an instruction by the CPU;
• the method comprising receiving, on the integrated circuit chip, an interrupt signal from the external computer device simulating an interrupt signal from the at least one other device.