Read ahead buffer for read accesses to system memory by input/output devices with buffer valid indication
AssigneeAdvanced Micro Devices, Inc.
InventorsGeoffrey S. S. Strongin, David W. Smith, Norman Hack
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorsGeoffrey S. S. Strongin, David W. Smith, Norman Hack
Estimating the term…
A computer system includes a read ahead buffer coupled to a memory controller and an input/output controller coupled to an input/output channel. An I/O device provides an initial read request over the input/output channel which specifies an address in system memory. The memory controller retrieves an amount of data from system memory larger than specified by the read request and provides the requested data to the input/output channel and thus the I/O device. At least a portion of the data retrieved from system memory is stored in the read ahead buffer. The read ahead buffer is marked as valid and identified by at least a portion of the address specified in the read request. When the same I/O device performs a subsequent read access, the I/O request circuit determines whether at least a portion of the address of the subsequent read request matches the portion of the address identifying the read ahead buffer and provides a tag match signal as an indication thereof. Data is then selectively provided from either the read ahead buffer or system memory to the input/output device in response to the second read request according to the tag match signal and the valid indication.
An integrated circuit coupled between system memory of a computer system and an input/output channel, comprising:
An integrated circuit coupled between system memory of a computer system and an input/output channel, comprising:
A method of operating a computer system including a read ahead buffer coupled to a memory controller and an input/output controller coupled to an input/output channel, comprising:
Dependencies are inferred from the claim text.