Method and apparatus for calculating delay times in semiconductor circuit

An apparatus for computing delay times of circuit elements of a semiconductor device, comprising:

• at least two coefficient tables storing a plurality of delay time ratio coefficient values, one of which being a first delay time ratio coefficient value, each of the delay time ratio coefficient values representing a ratio of a delay time determined by values of a plurality of dependency factors having a close correlation with one another to a predetermined reference delay time of a circuit element, said first coefficient table having a first matrix table of the plurality of delay time ratio coefficient values respectively associated with the plurality of dependency factors, one of which being a first dependency factor and said second coefficient table including a second matrix table of the first delay time ratio coefficient value and a second delay time ratio coefficient value, the first delay time ratio coefficient value being associated with the first dependency factor, and the second delay time ratio coefficient value being associated with a second dependency factor having a close correlation with the first dependency factor;
• a processing unit for acquiring at least one of the delay time ratio coefficient values from said first coefficient table, acquiring at least one of the first and second delay time ratio coefficient values from said second coefficient table, and computing a delay time of a circuit element using the acquired delay time ratio coefficient values and a reference delay time;
• and
• performing a circuit timing simulation using the delay time.

A method of generating at least two coefficient tables for use in computing delay times of circuit elements of a semiconductor device, comprising:

• computing a plurality of delay time ratio coefficient values, having first and second delay time ratio coefficient values, each of the delay time ratio coefficient values representing a ratio of a delay time determined by values of a plurality of dependency factors, one of which being a first dependency factor, the dependency factors having a close correlation with one another to a predetermined reference delay time of a circuit element;
• storing the plurality of delay time ratio coefficient values in the first coefficient table;
• storing the first and second delay time ratio coefficient values in the second coefficient table, the first delay time ratio coefficient value being associated with the first dependency factor, and the second delay time ratio coefficient value being associated with a second dependency factor having a close correlation with the first dependency factor;
• computing a delay time of a circuit element using the delay time ratio coefficient values;
• and
• performing a circuit timing simulation using the delay time.

A storage product including a recording medium where a computer readable program code for computing delay times of circuit elements of a semiconductor device is recorded therein, the program executing processes for:

• preparing at least two coefficient tables storing a plurality of delay time ratio coefficient values having a first delay time ratio coefficient value, each of the delay time ratio coefficient values representing a ratio of a delay time determined by values of a plurality of dependency factors having a close correlation with one another to a predetermined reference delay time of a circuit element, the first coefficient table having a first matrix table of the plurality of delay time ratio coefficient values respectively associated with the plurality of dependency factors having a first dependency factor and the second coefficient table having a second matrix table of the first delay time ratio coefficient value and a second delay time ratio coefficient value, the first delay time ratio coefficient value being associated with the first dependency factor, and the second delay time ratio coefficient value being associated with a second dependency factor having a close correlation with the first dependency factor;
• acquiring at least one of the delay time ratio coefficient values from the first coefficient table and acquiring at least one of the first and second delay time ratio coefficient values from the second coefficient table;
• computing a delay time of a circuit element using the acquired delay time ratio coefficient values and a reference delay time;
• and
• performing a circuit timing simulation using the delay time.