Method for decreasing false positives in frame synchronization of code division multiple access
AssigneeLucent Technologies Inc.
InventorChristopher Burke Barroso
Life of this patent
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Abstract
A solution to a problem of false positives in frame synchronization in telecommunication systems involves generating a separate channel estimate based only on the non-SW (all −1) bits of a pilot sequence. This non-SW channel estimate is used to correct received pilot SW symbols. These specially corrected symbols are rake combined separately from other symbols. The result is used exclusively for the frame synchronization detector. Normal channel estimate calculations and rake combining proceeds as usual. This method of frame synchronization only refers to SW bit matches. False positives are decreased using the invention.
Claims2
A method for decreasing false positives during the hypothesis test of an internal frame synchronization of a received multipath signal in at least one channel in a CDMA telecommunications system having channels with pilot blocks, each pilot block comprising framing symbols and synchronization word symbols, comprising the steps of:
- a) calculating a channel estimate based only on the framing symbols of the received pilot blocks in a multipath signal;
- b) correcting the synchronization word symbols of the received pilot blocks in the multipath signal by complex multiplication of the receive data by the channel estimate calculated in step (a);
- and
- c) using only the corrected synchronization word symbols from step (b) for the internal frame synchronization hypothesis test;
- wherein an expected frame synchronization results from steps (a) through (c), thereby decreasing the number of false positives.
Dependencies are inferred from the claim text.