Back to results
US 6,388,886 B1Granted
Semiconductor memory module and module system
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorYouichi Tobita
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorYouichi Tobita
Estimating the term…
Provided is a semiconductor memory module capable of decreasing a parasitic capacitance and a parasitic inductance which are incidental to a signal transmission path, thereby reducing a distortion of a signal waveform. In a memory module, four DRAMs are provided on a muttilayer printed circuit board in one line corresponding to a direction of arrangement of external terminals thereof and board terminal groups of the module are provided to make a pair along two long sides of the multilayer printed circuit board. The DRAM has external terminals extended from one of the long sides and external terminals extended from the other long side. Board terminals and board terminals in the board terminal group of the module are connected to the DRAM, and board terminals and board terminals in the board terminal group TGB of the module are connected to the DRAM.
A semiconductor memory module comprising:
A module system mounting a plurality of semiconductor memory modules comprising a wiring board, at least one semiconductor memory provided on at least one main surface of said wiring board and having a plurality of external terminals, a plurality of first board terminals and a plurality of second board terminals which are provided line symmetrically with respect to two opposed sides of said wiring board corresponding to said plurality of external terminals, respectively, and a wiring for electrically connecting one of said plurality of external terminals to one pair of said plurality of first and second board terminals corresponding thereto, comprising:
A module system mounting a plurality of semiconductor memory modules comprising a wiring board, at least one semiconductor memory provided on at least one main surface of said wiring board and having a plurality of external terminals, a plurality of first board terminals and a plurality of second board terminals which are provided line symmetrically with respect to two opposed sides of said wiring board corresponding to said plurality of external terminals, respectively, and a wiring for electrically connecting one of said plurality of external terminals to one pair of said plurality of first and second board terminals corresponding thereto, said main surfaces of said semiconductor memory modules being opposed to each other,
Dependencies are inferred from the claim text.