Asynchronous superconductor serial multiply-accumulator

A system for converting an analog input signal to a digital output signal where the digital output signal is a frequency conversion representation of the input signal, the system comprising:

• an oscillator circuit receiving the analog input signal and converting the analog input signal to a series of oscillator pulses;
• a digital gate coupled to the oscillator circuit for alternately blocking and passing the series of pulses to generate gate output pulses in response to a gate control signal;
• a plurality of switches receiving a subsequent pulse of the gate output pulses independently relative to the other pulses from the digital gate and a binary coefficient from a memory, each of the switches being enabled depending on the associated binary coefficient, the enabled switches transmitting one of the gate output pulses independently from the others when the associated switch is enabled, and
• a binary ripple counter receiving the transmitted gate pulses from the switches, wherein the binary ripple counter generates the digital output signal by multiplying each of the transmitted gate pulses by the binary coefficient and accumulating each of the multiplied pulses, wherein the series of switches and the binary ripple counter define a multiply-accumulator which repeats the multiplication of each of the gate output pulses by the binary coefficient and the accumulation of the multiplied products for a predetermined sampling period.

A method of converting an analog input signal to a digital output signal, said method comprising the steps of:

• converting the analog input signal to a series of pulses;
• alternately blocking and passing the pulses at a first predetermined control rate;
• providing a high resolution binary coefficient from a memory;
• multiply the series of pulses by the high resolution binary coefficient;
• and
• accumulating the multiplied pulses for generating a series of products.