Δ-Σ modulator and Δ-Σ A/D converter

A Δ-Σ modulator comprising:

• a comparator having two negative resistance elements which show an N-type differential negative resistance and are connected to each other in series between two terminals and a comparison input transistor connected in parallel to one of said two negative resistance elements, a clock pulse voltage being applied between said two terminals, and said comparator outputting a low-level pulse signal when an input electric potential is higher than a threshold and outputting a high-level pulse signal when said input. electric potential is lower than said threshold;
• a conversion-input transistor, for converting an input voltage into electric current, having an output current terminal connected to an input terminal of said comparison input transistor;
• a capacitance element provided so that charge amount thereof is decreased by flow of electric current through said conversion input transistor and an electric potential proportional to said charge amount is used for said input electric potential to said comparator;
• and
• a feedback transistor, to which an output of the comparator is inputted, operating in such a way as to increase the charge amount of the capacitance element when the output of the comparator becomes a high level.

Δ-Σ modulator comprising:

• a comparator having two negative resistance elements which show an N-type differential negative resistance and are connected to each other in series between two terminals and a comparison input transistor connected in parallel to one of said two negative resistance elements, a clock pulse voltage being applied between said two terminals, and said comparator outputting a low-level pulse signal when an input electric potential is higher than a threshold and outputting a high-level pulse signal when said input electric potential is lower than said threshold;
• a conversion input transistor, for converting an input voltage into electric current, having an output current terminal connected to an input terminal of said comparison input transistor;
• a capacitance element provided so that charge amount thereof is decreased by flow of electric current through said conversion input transistor and an electric potential proportional to said charge amount is used for said input electric potential to said comparator;
• and
• a feedback transistor, to which an output of the comparator is inputted, operating in such a way as to increase the charge amount of the capacitance element when the output of the comparator becomes a high level.

A Δ-Σ converter comprising:

• a comparator having a plurality of negative resistance elements which show an N-type differential negative resistance and are connected to each other in series between two terminals and a comparison input transistor connected in parallel to at least one of said negative resistance elements, a clock pulse voltage being applied between said two terminals;
• a conversion input transistor for converting an input voltage into electric current;
• a capacitance element connected to an output current terminal of said conversion input transistor and to an input terminal of said comparison input transistor of said comparator;
• a feedback transistor to which an output of said comparator is inputted and through which electric current flows into said capacitance element in a direction opposite to a direction of electric current flowing through said conversion input transistor;
• and
• a digital filter to which an output of said comparator is inputted.

A Δ-Σ converter comprising:

• a comparator-having two negative resistance elements which show an N-type differential negative resistance and are connected to each other in series between two terminals and a comparison input transistor connected in parallel to one of said two negative resistance elements, a clock pulse voltage being applied between said two terminals, and said comparator outputting a low-level pulse signal when an input electric potential is higher than a threshold and outputting a high-level pulse signal when said input electric potential is lower than said threshold;
• a conversion input transistor, for converting an input voltage into electric current, having an output current terminal connected to an input terminal of said comparison input transistor;
• a capacitance element provided so that charge amount thereof is decreased by flow of electric current through said conversion input transistor and an electric potential proportional to said charge amount is used for said input electric potential to said comparator;
• and
• a feedback transistor, to which an output of the comparator is inputted, operating in such a way as to increase the charge amount of the capacitance element when the output of the comparator becomes a high level;
• and
• a digital filter to which an output of said comparator is inputted.

A Δ-Σ converter comprising:

• a comparator having two negative resistance elements which show an N-type differential negative resistance and are connected to each other in series between two terminals and a comparison input transistor connected in parallel to one of said two negative resistance elements, a clock pulse voltage being applied between said two terminals, and said comparator outputting a high-level pulse signal when an input electric potential is higher than a threshold and outputting a low-level pulse signal when said input electric potential is lower than said threshold;
• a conversion input transistor, for converting an input voltage into electric current, having an output current terminal connected to an input terminal of said comparison input transistor;
• a capacitance element provided so that charge amount thereof is decreased by flow of electric current through said conversion input transistor and an electric potential proportional to said charge amount is used for said input electric potential to said comparator;
• and
• a feedback transistor, to which an output of the comparator is inputted, operating in such a way as to increase the charge amount of the capacitance element when the output of the comparator becomes a high level.