US 6,388,533 B1Granted

Programmable ring oscillator

AssigneeTexas Instruments Incorporated

InventorGary L. Swoboda

Life of this patent

Estimating the term…

Loading patent…

Abstract

A controllable ring oscillator clock circuit includes a plurality of ring oscillator stages disposed in a linear chain. Each stage has a latch that determines if this stage is the last stage in the ring. In a propagate state of the latch the ring pulse is sent to the next stage. In a return state of the latch the ring pulse is returned to the prior stage. The latches are programmed like a shift register. A more command transfers the propagate state to the next stage. This increases the length of the delay line and thus decreases the oscillator frequency. A less command transfers the return state to the prior state, decreasing the ring delay and increasing the oscillator frequency. In the preferred embodiment the delay stages are deployed as even and odd pairs with only the even or the odd stages changed at one time. This enables a simple structure because the pairs operate like a master-slave flip-flop, that is the data can move only a single stage at a time.

Claims11

Dependent claims

A ring oscillator clock circuit comprising:

a plurality of ring oscillator stages disposed in a linear chain from a first ring oscillator stage to a last ring oscillator state, each ring oscillator stage including
a propagate input,
a propagate output,
a return input,
a return output;
a latch storing either a first state or a second state, said latch having a true output and a complement output,
a first AND gate having a first input connected to said propagate input, a second input connected to said true output of said latch and an output connected to said propagate output,
a second AND gate having a first input connected to said propagate input, a second input connected to said complement output of said latch and an output, and
a third AND gate having a first input connected to said return input, a second input connected to said output of said second AND gate and an output connected to said return output;
an output stage connecting said return output of said first ring oscillator stage to said propagate input of said first ring oscillator stage to circulate a ring pulse, said output stage generating an oscillator clock signal;
wherein said propagate input of a ring oscillator stage is connected to said propagate output of a prior ring oscillator state;
wherein said return input of a ring oscillator stage is connected to said return output of a next ring oscillator state;
wherein said propagate output of said last ring oscillator stage is connected to said return input of said last ring oscillator stage.

10 more elements

Dependencies are inferred from the claim text.