US 6,388,528 B1 · MMIC folded power amplifier

Abstract

A MMIC power amplifier having a smaller die size and higher power output are realized with the improved amplifier and transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” In a shared input configuration, a compensation network may be coupled to the input. The improved FET configuration reduces the number of splitting and combining networks by up to 50% over the prior art and the die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art. The improved amplifier configuration provides a multi-sectional configuration wherein one section may be the mirrored image of another. In a two section amplifier, the amplifier appears to be “folded.”

Claims22

Dependent claims

A power amplifier comprising:

a plurality of transistors each having an input and an output, the transistors arranged in a folded configuration such that each of the transistors includes gate fingers with at least one of the transistors having gate fingers in vertical alignment with the gate fingers of another transistor;
a compensation network coupled to a shared input of a transistor pair;
signal splitter circuitry for providing substantially in-phase signals to the transistors;
and
combiner circuitry for in-phase combining outputs of the transistors.

2 more elements

Dependencies are inferred from the claim text.

MMIC folded power amplifier

Life of this patent

MMIC folded power amplifier

Life of this patent

Abstract

Claims22