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US 6,388,511 B1Granted
Filter circuit
AssigneeTexas Instruments Incorporated
InventorKatsuhiro Kanao
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AssigneeTexas Instruments Incorporated
InventorKatsuhiro Kanao
Estimating the term…
Offers a filter circuit in which the dedicated capacitor surface area is small and in which a dedicated process just for capacitor formation is unnecessary. The filter circuit of this invention is an active filter circuit wherein an operational amplifier AMP1 and capacitors (C1, C2) are formed on the same semiconductor substrate. The capacitors (C1, C2) are constructed from an insulated gate field effect transistor wherein the mutually connected source and drain forms one of the electrodes, the gate forms the other electrode, and the gate insulating film is used in the capacitor dielectric film. For capacitor C1, a DC bias means (DC bias circuit V2) that applies a prescribed DC bias is connected between the electrodes of the said capacitor. A DC bias means can also be provided at capacitor C2, but here, it can be omitted by just increasing the DC level of the input signal Vin just a prescribed level.
A filter circuit comprising an operational amplifier, a plurality of resistors electrically connected to the operational amplifier, an input terminal for receiving an input signal coupled to the operational amplifier through at least one of the plurality of resistors, and an output terminal coupled to an output of the operational amplifier for providing an output signal, a plurality of capacitors electrically connected to the operational amplifier, wherein at least one of said plurality of capacitors comprise a source and drain of a MOS transistor connected together to form a first electrode of the capacitor, and a gate of the MOS transistor forming a second electrode of the capacitor, a DC bias means coupled to said output of said amplifier for applying a predetermined DC bias voltage across the electrodes of the capacitor, for stabilizing capacitance of the capacitor and wherein the operational amplifier, the resistors, the capacitors, and the DC bias means are formed on the same semiconductor substrate.
A filter circuit comprising a first operational amplifier, a plurality of resistors electrically connected to the first operational amplifier, an input terminal for receiving an input signal coupled to the operational amplifier through at least one of the plurality of resistors, and an output terminal coupled to an output of the operational amplifier for providing an output signal, a plurality of capacitors electrically connected to the first operational amplifier, wherein at least one of said plurality of capacitors comprise a source and drain of a first MOS transistor connected together to form a first electrode of the capacitor, and a gate of the MOS transistor forming a second electrode of the capacitor, a DC bias means applying a predetermined DC bias voltage across the electrodes of the capacitor, and wherein the first operational amplifier, the resistors, the capacitors, and the DC bias means are formed on the same semiconductor substrate, wherein first and second resistors of the plurality of resistors are connected in series between said input terminal and a non-inverted input terminal of the first operational amplifier, a first capacitor of the plurality of capacitors is connected between the non-inverted input terminal and ground, a second capacitor of the plurality of capacitors and the DC bias means are connected in series between a junction of the first and second resistors and the inverted input terminal of the first operational amplifier, and the inverted input terminal is connected to the output terminal of the first operational amplifier.
A filter circuit comprising an operational amplifier, a plurality of resistors electrically connected to the operational amplifier, an input terminal for receiving an input signal coupled to the operational amplifier through at least one of the plurality of resistors, and an output terminal coupled to an output of the operational amplifier for receiving an output signal, a plurality of capacitors electrically connected to the operational amplifier, wherein at least one of said plurality of capacitors comprise a source and drain of a first MOS transistor connected together to form a first electrode of the capacitor, and a gate of the MOS transistor forming a second electrode of the capacitor, a DC bias means applying a predetermined DC bias voltage across the electrodes of the capacitor, and wherein the operational amplifier, the resistors, the capacitors, and the DC bias means are formed on the same semiconductor substrate, wherein, a first capacitor of the plurality of capacitors, the DC bias means, and a second capacitor of the plurality of capacitors are connected in series between the signal input terminal and the non-inverted input terminal of the operational amplifier, a first resistor of the plurality of resistors is connected between the non-inverted input terminal and ground, a second resistor of the plurality of resistors is connected between the junction of the first capacitor and the DC bias means and the inverted input terminal of the operational amplifier, and the inverted input terminal and output terminal of the operational amplifier are connected.
Dependencies are inferred from the claim text.