Clock generation circuit
AssigneeSony Corporation
InventorsKiyoshi Miura, Yuki Moriya
Life of this patent
Estimating the term…
Abstract
A clock generation circuit including a multiphase clock generation circuit for generating multiphase clocks of a predetermined frequency, pulse generation circuits for generating a plurality of non-overlap pulses by using at least a part of the multiphase clocks of the multiphase clock generation circuit, and a circuit for obtaining an OR of the plurality of non-overlap pulses of the pulse generation circuits and thereby generating a clock not having a simple whole multiple ratio relationship with respect to a frequency of the multiphase clocks or a clock having a higher frequency without causing an increase of power consumption and an increase of chip area.
Claims18
A clock generation circuit, comprising
- a multiphase clock generation circuit for generating multiphase clocks of a predetermined frequency,
- pulse generation circuits for generating a plurality of non-overlap pulses by using at least a part of the multiphase clocks of the multiphase clock generation circuit, and
- a combining circuit for combining a plurality of non-overlap pulses of said pulse generation circuits to generate a clock having a different frequency from that of said multiphase clocks.
A clock generation circuit, comprising:
- a multiphase clock generation circuit having a generation portion for generating reference multiphase clocks having a predetermined frequencies f0, a frequency divider for dividing by a dividing ratio M a frequency of one clock among the reference multiphase clocks of said generation portion, and a shifter for shifting a dividing signal of said frequency divider by reference multiphase clocks;
- pulse generation circuits for generating a plurality of non-overlap pulses by using at least a part of the multiphase clocks output by said multiphase clock generation circuit;
- and
- a combining circuit for combining a plurality of non-overlap pulses by said pulse generation circuits to compose a clock having a different frequency fout from that of said reference multiphase clocks.
A clock generation circuit, comprising:
- means for generating multiphase clocks of a predetermined frequency;
- means for generating a plurality of non-overlap pulses using at least a part of said multiphase clocks;
- and,
- means for generating at least two clocks from said plurality of non-overlap pulses, said two clocks having two different frequencies, both of which differ from said predetermined frequency of said multiphase clocks, said two clock frequencies having a relationship where the higher frequency is not whole number multiple of the lower frequency.
Dependencies are inferred from the claim text.