Self-switched cascode write driver

An H-bridge circuit comprising:

• an inductive load having a first port and a second port;
• first and second switches coupled to said first port to switch said inductive load;
• third and fourth switches coupled to said second port to switch said inductive load;
• first and second cascode transistors coupled between said first and second switches respectively and said inductive load;
• third and fourth cascode transistors coupled between said third and fourth switches respectively and said inductive load;
• wherein only one of said first and second switches conducts at any one time and only one of said third and fourth switches conducts at any one time;
• and
• wherein said second and fourth cascode transistors each comprises a transistor having a base port resistively coupled to a first bias voltage and a collector port clamped with respect to said base port.

A circuit comprising:

• a load having a first port and a second port;
• a first switch coupled between a first node and said first port to switch said load;
• a second switch coupled between said first node and said second port to switch said load;
• a third switch coupled to a second node to switch said load;
• a fourth switch coupled to a second node to switch said load;
• a first cascode transistor coupled between said third switch and said first port, said first cascode transistor having a base port resistively coupled to a first bias voltage and a collector port clamped with respect to said base port;
• and
• a second cascode transistor coupled between said fourth switch and said second port, said second cascode transistor having a base port resistively coupled to said first bias voltage and a collector port clamped with respect to said base port.