Loading patent…
AssigneeConexant Systems, Inc.
InventorsRichard A. Ward, Mark R. Tennyson, Anil Mankar
Estimating the term…
An integrated circuit comprising a relatively simple high voltage tolerant output circuit that may be placed in a high impedance state (i.e., tri-stated) when the voltage at a corresponding signal connection point reaches a predetermined voltage reflecting a logic high level. In one embodiment of the invention, the output circuit is responsive to assertion of a control signal to selectively enter a high impedance state. The control signal is asserted by a control circuit following the detection of a logic high signal of a predetermined duration at the external signal connection point. The predetermined duration may correspond to transmission line delays of a signal line driven by the output circuit. For example, the delay in placing the output circuit in a high impedance state may correspond to the length of time needed to allow transmission line reflections to dissipate to an acceptable level. Disabling the output circuit following such a delay severs the potential current path between the supply voltage of the integrated circuit and an external voltage source coupled to the signal line via a pull-up device.
An integrated circuit producing output signals for provision to a signal line coupled to an external voltage supply through a pull-up device, the integrated circuit comprising:
A method for controlling an output buffer of an integrated circuit, the output node of the output buffer being coupled via an external device to an external voltage source providing a voltage level greater than the operating voltage of the output buffer, comprising:
A computing device producing output signals, the computing device comprising:
Dependencies are inferred from the claim text.