US 6,388,328 B1Granted

Capping layer in interconnect system and method for bonding the capping layer onto the interconnect system

AssigneeIntel Corporation

InventorsBrian Doyle, Quat T. Vu, Leopold Yau

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Abstract

The present invention provides an interconnect system. The interconnect system includes a substrate, a first dielectric layer deposited upon the substrate. The interconnect system further includes at least two electrically conductive interconnect lines formed upon the first dielectric layer. Each of the at least two interconnect lines have a top surface and side surfaces. Adjacent side surfaces of two adjacent interconnect lines define therebetween a space that has a dielectric constant substantially equal to 1. A dielectric film is bonded upon the top surface of the at least two interconnect lines. The dielectric film substantially prevents obstruction of the space by further process.

Claims8

Dependent claims

An interconnect system for an integrated circuit comprising:

a substrate;
a first dielectric layer formed upon said substrate;
a plurality of electrically conductive interconnect lines formed upon said first dielectric layer, each of said interconnect lines having top and side surfaces, a space being defined between adjacent side surfaces of adjacent pairs of said interconnect lines, said space being filled with air;
an electrically conductive cladding disposed over said top surface of said interconnect lines;
and
a dielectric film having first and second sides, a stress-dislocated layer of silicon covering said first side, said second side of the dielectric film being bonded to said cladding, said space being substantially unencumbered by said dielectric film.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/143,295Filed 28 Aug 1998 · continuation
Priority: 28 Jun 1996
Granted: 14 May 2002
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10W 20/077
Of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers: on sidewalls or on…
H10W 20/072
Of dielectric parts thereof: of dielectric parts comprising air gaps
H10W 20/46
Characterised by their insulating parts: comprising air gaps
H10W 20/495
Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes: capacitive…